Image sensor and its manufacture method, and dark pixel interconnect patterns

Abstract

The present invention discloses an interconnect layout, an image sensor including the interconnect layout and a method for fabricating the image sensor each use a first electrically active physical interconnect layout pattern within an active pixel region and a second electrically active physical interconnect layout pattern spatially different than the first electrically active physical interconnect layout pattern within a dark pixel region. The second electrically active physical interconnect layout pattern includes at least one electrically active interconnect layer interposed between a light shield layer and a photosensor region aligned therebeneath, thus generally providing a higher wiring density. The higher wiring density within the second layout pattern provides that that the imagesensor may be fabricated with enhanced manufacturing efficiency and a reduction of metallization levels.

Description

Image sensor, manufacturing method thereof, interconnect layout of sensor pixel array technical field The present invention generally relates to pixels within image sensors. More specifically, the present invention relates to interconnect patterns within pixels within an image sensor. Background technique Semiconductor image sensors including complementary metal oxide semiconductor (CMOS) image sensors and charge coupled device (CCD) image sensors are becoming increasingly popular. Generally, semiconductor image sensors are used as image elements in various types of consumer and industrial products. Non-limiting examples of applications for image sensors include scanners, photocopiers, digital cameras, and video communication devices. CMOS image sensors offer the advantage over other types of semiconductor-derived sensors hitherto in that CMOS image sensors are generally cheaper to manufacture. CMOS image sensors also generally consume less power. Image sensors typica...

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CMOS image sensors also typically consume less power

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