Nand flash memory device with ecc protected reserved area for non volatile storage of redundancy data

Abstract

Basic redundancy information is non-volatily stored in a reserved area of an addressable area of a memory array, and is copied to volatile storage therein at every power-on of the memory device. The unpredictable though statistically inevitable presence of failed array elements in such a reserved area of the memory array corrupts the basic redundancy information established during the test-on wafer (EWS) phase of the fabrication process. This increases the number of rejects, and lowers the yield of the fabrication process. This problem is addressed by writing the basic redundancy data in the reserved area of the array with an ECC technique using a certain error correction code. The error correction code may be chosen among majority codes 3, 5, 7, 15 and the like, or the Hamming code for 1, 2, 3 or more errors, as a function of the fail probability of a memory cell as determined by the EWS phase during fabrication.

Description

technical field [0001] The present invention relates to memory devices, and more particularly to NAND flash memory devices with area efficient redundancy structures. Background technique [0002] In a NAND type memory device, the device-specific self-configuration data and redundant data in the identified failure element of the memory cell array and in the address of the attribute replacement element in the redundant resource area of ​​the array are usually in the non- The volatile mode is stored in a dedicated fuse array that is permanently set during the on-wafer testing (EWS) phase of the device during fabrication. [0003] Figure 1 is a simplified high-level block diagram of a common NAND flash memory device, in which the fuse arrays containing the basic redundant data and self-configuration implementations each time the device is powered up are clearly placed by delineating the relevant boxes with thicker lines, That is: configure the fuse (CONFIGURATION FUSE) block, a...

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Problems solved by technology

However such a solution is technically hardly applicable within the confines of modern NAND-type flash memory device manufacturing processes in addition to the inherently large area requirement.

[0010] While seemingly promising non-volatile storage of redundant and self-configuring data, another option envisaging the use of portions, or blocks, or dedicated areas of flash memory cell arrays as "one-time programmable" memory blocks cannot be applied because Implementation of this option in the case of NAND flash memory devices is hampered by significant problems stemming from the following two conditions:

[0011] a) In NAND type flash memory devices, unlike other types of flash memory, the gerarchic organization of the cell array cannot be realized because it would be too burdensome in terms of silicon area requirements, and thus, the cell array bit lines for all cell blocks is shared;

[0012] b) All blocks of a certain number of word lines of a cell array are usually formed in N-type and P-type grooves (tub) formed in a P-type silicon substrate, so the cell blocks may be hardly electrically isolated from each other

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