SDRAM address mapping and read-write rotation method for real-time interlaced and non-interlaced scanning
A technology of SDRAM2 and address mapping, applied in the field of electronic information
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[0043] A preferred embodiment of the present invention is described in detail as follows in conjunction with accompanying drawing:
[0044] In this embodiment, the field frequency of input video data is 50Hz, the resolution is 720×288, the scanning format is interlaced scanning, and the data unit is 16-bit YUV4:2:2 format, wherein Y is represented by 8-bit data, and UV is represented by 8-bit data. The bit data indicates that the frame frequency of the output video is 75Hz, the resolution is 720×576, the scanning format is progressive scanning, and the data unit format remains unchanged. The specifications of the selected SDRAM memory are 32 bits x 1024 rows x 256 columns x 4Bank.
[0045] Such as figure 1 As shown, each row of input video data is stored in the same row of SDRAM according to the number of rows in the video, and each row is stored starting from the starting column of Bank0 of the row of SDRAM in full-page write mode, and the 256 columns are about to be full ...
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