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Reed-Solomon decoder with low hardware spending

A hardware overhead and decoder technology, applied in the field of Reed-Solomon decoders, can solve complex problems, achieve the effects of reducing chip area and power consumption, optimizing hardware implementation complexity, and reducing hardware complexity

Active Publication Date: 2010-11-03
MAXSCEND MICROELECTRONICS CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Reed-Solomon decoding is much more complicated than encoding

Method used

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  • Reed-Solomon decoder with low hardware spending
  • Reed-Solomon decoder with low hardware spending
  • Reed-Solomon decoder with low hardware spending

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Embodiment Construction

[0041] Such as figure 2 As shown, it is a structural block diagram of the Reed-Solomon decoder in the T-DMB receiving system of the present invention, including syndrome polynomial / money search / error estimation value calculation multifunctional module, error position polynomial / error estimation value polynomial calculation Multifunctional module, Forney algorithm module and error correction module. Wherein, the syndrome polynomial / chian search / error estimate calculation multifunctional module can realize syndrome calculation, chi search and error estimate calculation in time division under the control of the timing control module in the T-DMB receiving system. And described error position polynomial / erroneous estimated value polynomial seeks multi-function module, can realize adopting improved non-inverse Berlekamp-Massey algorithm to solve iterative algorithm for error position polynomial, this modified algorithm does not need to call inversion operation every iteration, Th...

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Abstract

The invention claims a low hardware overhead Reed-Solomon decoder, comprising: a syndrome multinomial / chain search / error estimated value calculation multifunctional module, which realizes calculation of syndrome multinomial through algorithm S=((r<n-1>alphai-1+r<n-2>)alphai-1+...+r<1>)alphai-1+r<0> 1<=i<=2t, and is used for timely realizing functions of hidden search and error evaluation calculation etc; error position multinomial / error estimated value multinomial acquisition multifunctional module which has no need for iterating transfer inversion operation every time when performing solving using error position multinomial iteration algorithm through improved smooth Berlekamp-Massey algorithm so as to save the hardware resource, meanwhile, it can further timely realize acquisition of error position multinomial / error estimated value multinomial. The invention optimized decoding algorithm of Reed-Solomon decoder, reduces complexity of decoded hardware, greatly reduces the expenditure on hardware, and reduces the chip area and power consumption of the decoder.

Description

technical field [0001] The invention relates to a Reed-Solomon decoder in a T-DMB system, in particular to a Reed-Solomon decoder with low hardware overhead in the T-DMB system. Background technique [0002] T-DMB is a terrestrial digital multimedia broadcasting standard launched by South Korea. This standard is based on the European digital broadcasting standard DAB with some modifications, in order to transmit wireless digital TV programs to handheld devices such as mobile phones, PDAs and portable TVs. In order to extend the time for these handheld devices to watch wireless TV programs and reduce the cost of the devices, the market places high demands on the area and power consumption of the receiving chip of the T-DMB system. [0003] In the T-DMB system, in order to resist burst errors during transmission, it is necessary to perform Reed-Solomon encoding on the data at the T-DMB transmitter, and correspondingly perform Reed-Solomon decoding on the data at the T-DMB rece...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N7/26H04N5/44H03M13/15
Inventor 马伟剑
Owner MAXSCEND MICROELECTRONICS CO LTD
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