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Stereo encapsulation structure

A three-dimensional packaging and packaging technology, applied in the direction of electric solid devices, semiconductor devices, semiconductor/solid device components, etc., to achieve the effect of blocking or electromagnetic interference, reducing electromagnetic interference, and high line density

Active Publication Date: 2008-12-24
CYNTEC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] One purpose of the present invention is to propose a three-dimensional packaging structure to solve the problems of known packaging structures

Method used

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Embodiment Construction

[0054] A detailed description of some embodiments of the invention follows, however, the invention can be practiced broadly in other embodiments beyond this detailed description. That is to say, the scope of the present invention is not limited by the proposed embodiments, but should be based on the patent scope of the present invention. In addition, in order to provide a clearer description and an easier understanding of the present invention, various parts in the drawings are not drawn according to their relative dimensions, and some dimensions have been exaggerated compared with other relevant dimensions; irrelevant details are not fully drawn , in order to simplify the drawings.

[0055] Such as figure 2 As shown, the three-dimensional packaging structure 2 according to an embodiment of the present invention includes a semiconductor package 21 , an energy storage element 23 and a shielding layer 25 . The semiconductor package 21 has a first surface 213 , a second surfac...

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Abstract

The invention relates to a three-dimensional encapsulation structure, which comprises a semiconductor encapsulation body, an energy-storage element and a shielding layer. The semiconductor encapsulation body comprises a first conducting element, a second conducting element and a control element, wherein, the energy-storage element is stacked on the semiconductor encapsulation body, the energy-storage element is electrically connected with the second conducting element and comprises a magnetic body, and the shielding layer is arranged between the controlling element and at least part of the magnetic body, to interdict or reduce the electromagnet interference, thereby achieving a more miniaturized encapsulation structure. The three-dimensional encapsulation structure can also be applied to a loading point converter.

Description

technical field [0001] The invention relates to a packaging structure, in particular to a semiconductor three-dimensional packaging structure. Background technique [0002] The common trend of all kinds of electronic products today is nothing more than light, thin, short, and small. How to place the most components or circuits in a limited space is what designers who design electronic products most want to achieve. Target. Therefore, based on this idea, the packaging structure in three-dimensional space has also become a solution to increase component density. [0003] Point-of-Load (POL) converters are also known as DC-DC converters (DC / DC converters). Traditional point-of-load converters are packaged in Ball Grid Array (BGA) or substrate grid Array (Land Grid Array, LGA) packaging and other packaging methods. [0004] Such as figure 1 As shown, the known point-of-load converter 1 includes a control element 11, a metal oxide semiconductor field effect transistor (MOSFET...

Claims

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Application Information

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IPC IPC(8): H01L25/00H01L23/552
CPCH01L2224/48091H01L2924/13055H01L2924/13091
Inventor 陈大容刘春條温兆均
Owner CYNTEC