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Stereo encapsulation structure

A technology of three-dimensional packaging and packaging, which is applied in the direction of electric solid-state devices, semiconductor devices, semiconductor/solid-state device components, etc., to achieve the effects of reducing electromagnetic interference, high line density, blocking or electromagnetic interference

Active Publication Date: 2010-06-02
CYNTEC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] One purpose of the present invention is to propose a three-dimensional packaging structure to solve the problems of known packaging structures

Method used

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  • Stereo encapsulation structure
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Embodiment Construction

[0054] The detailed description of some embodiments of the present invention is as follows. However, in addition to the detailed description, the present invention can also be widely implemented in other embodiments. That is, the scope of the present invention is not limited by the proposed embodiments, but should be subject to the scope of the patent application filed by the present invention. In addition, in order to provide a clearer description and make it easier to understand the present invention, the various parts in the drawings are not drawn according to their relative dimensions. Some dimensions have been exaggerated compared with other related dimensions; the irrelevant details are not completely drawn. , In order to simplify the drawings.

[0055] Such as figure 2 As shown, the three-dimensional package structure 2 of an embodiment of the present invention includes a semiconductor package 21, an energy storage element 23, and a shielding layer 25. The semiconductor ...

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Abstract

The invention relates to a three-dimensional encapsulation structure, which comprises a semiconductor encapsulation body, an energy-storage element and a shielding layer. The semiconductor encapsulation body comprises a first conducting element, a second conducting element and a control element, wherein, the energy-storage element is stacked on the semiconductor encapsulation body, the energy-storage element is electrically connected with the second conducting element and comprises a magnetic body, and the shielding layer is arranged between the controlling element and at least part of the magnetic body, to interdict or reduce the electromagnet interference, thereby achieving a more miniaturized encapsulation structure. The three-dimensional encapsulation structure can also be applied to aloading point converter.

Description

Technical field [0001] The invention relates to a packaging structure, in particular to a three-dimensional packaging structure for semiconductors. Background technique [0002] The common trend of all kinds of electronic products nowadays is nothing more than lightness, thinness, shortness and smallness. How to place the most components or circuits in a limited space is what the current designers of electronic products want to achieve. aims. Therefore, based on this idea, a three-dimensional package structure has also become a solution to improve component density. [0003] Point-of-Load (POL) converters are also known as DC / DC converters. Traditional point-of-load converters are packaged in ball grid array (BGA) or substrate grid Array (Land Grid Array, LGA) packaging and other methods of packaging. [0004] Such as figure 1 As shown, the known point-of-load converter 1 includes a control element 11, a metal oxide field effect transistor (MOSFET) 13 and a choke coil (choke) 15. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/00H01L23/552
CPCH01L2224/48091H01L2924/13055H01L2924/13091
Inventor 陈大容刘春條温兆均
Owner CYNTEC
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