Method for responding and stopping response of host computer and processing peripheral interrupt

A host and host service technology, applied in the field of computer systems, can solve buffer overflow and other problems, achieve the effect of simplifying difficulty and solving buffer overflow
CN101373443AInactive Publication Date: 2009-02-25VIMICRO CORP

Patent Information

Authority / Receiving Office
CN Β· China
Current Assignee / Owner
VIMICRO CORP
Publication Date
2009-02-25
Estimated Expiration
Not applicable Β· inactive patent

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Abstract

A method of a host computer processing peripheral interrupt comprises the steps as follows: storing interrupt type identification of responsive interrupt of each type in the host computer; outputting information to a communication port between an interrupt subprogram and a host computer after the peripheral generates the interrupt and before the corresponding interrupt subprogram is dispatched to conduct implementing functions, or after the interrupt is ended; the information contains an interrupt type identification and a status indication identification of the interrupt, and the value of the status indication identification correspondingly shows that the interrupt is generated or ended; when the host computer detects information received by the communication port, if the generation of the interrupt is judged according to the value of the status indication identification, whether the interrupt type identification carried in the information is stored in the local area is judged; if yes, the interrupt responded; if the ending status of the peripheral interrupt is judged according to the value of the status indication identification, whether the interrupt type identification carried in the information is stored in the local area is judged; if yes, the response interrupt is stopped. The invention solves the problem of buffer overflow caused by too long peripheral interrupt time.
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Description

technical field

[0001] The invention relates to a computer system, in particular to a method for a host computer to respond, stop responding and process peripheral interrupts. Background technique

[0002] In the synchronous debugging and application of the peripheral hardware and the host (host) side, the host responds to the interrupt generated by the peripheral has always been a relatively difficult bottleneck. This is because the interrupts generated by the general peripherals can only be detected by themselves, and the functions are realized by responding to the interrupt service subroutine, but the host cannot directly know when the peripherals generate interrupts, and when they are interrupted. When to end the interruption.

[0003] When performing synchronous debugging, the existing method for the host to detect the end of the peripheral interrupt is to let the peripheral update the flag bit in its own memory after the interrupt service is completed, and the host se...

Claims

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