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Metallic layer circuit board diagram pre-correcting method

A circuit board, metal layer technology, applied in the photoengraving process of the pattern surface, the original for photomechanical processing, optics, etc., can solve the problem of increasing the running time, affecting the optical convergence speed, increasing the photomask making time and Production difficulty, etc.

Active Publication Date: 2011-07-20
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

However, this method not only expands the two-dimensional graphics in the metal layer circuit board graphics, but also changes the original one-dimensional graphics into two-dimensional graphics, so the original layout design is changed a lot, and the cost of correcting fragments will be increased. Quantity and number of two-dimensional graphics (see Figure 5 ), thus affecting the convergence speed of optical proximity correction and increasing the running time
At the same time, after this method is corrected, the two-dimensional pattern of the photomask increases greatly, which will also increase the production time and difficulty of the photomask.

Method used

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  • Metallic layer circuit board diagram pre-correcting method
  • Metallic layer circuit board diagram pre-correcting method
  • Metallic layer circuit board diagram pre-correcting method

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Embodiment Construction

[0015] The method for pre-correcting the metal layer circuit board graphics of the present invention is used before the optical proximity correction software performs a conventional optical proximity correction step on the metal layer circuit board graphics. The metal layer circuit board graphics include one-dimensional graphics and two-dimensional graphics, By enlarging the two-dimensional graphics (see Figure 6 ) to increase the overlapping space between the metal layer and the lead hole layer after the actual photolithography (see Figure 7 ).

[0016] The pre-amplification of the two-dimensional graphics in the metal layer circuit layout can be done through the following operations: input the circuit board graphic information of the lead hole layer adjacent to the metal layer into the optical proximity correction software for matching, so that the metal layer circuit board graphics and the lead hole The layer circuit board graphics are superimposed, and the target correc...

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Abstract

The invention discloses a method used for pre-correcting a metal layer circuit board graphic. The metal layer circuit board graphic comprises a unidimensional graphic and a two-dimensional graphic. The method is characterized in that the two-dimensional graphic in the metal layer circuit board graphic are amplified before the conventional optical proximity correction is performed on the metal layer circuit board graphic by the use of optical proximity correction software. By the pre-correcting method, the finally obtained metal layer optical mask graphic has increased overlapping space of themetal layer and the adjacent fairlead layer after being photoetched; meanwhile, fragments corrected by the method is identical with the fragments corrected by the conventional optical proximity correction and does not increase too much running time of the proximity correction procedure, and the method can be used in the pre-correction before the optical proximity correction of all metal layer circuit board graphics.

Description

technical field [0001] The invention relates to an optical proximity correction method. Background technique [0002] In the advanced photolithography process, due to the reduction in the size of the exposure pattern, pre-optical proximity correction must be performed on the photomask pattern to compensate for the optical proximity effect caused by the limited resolution of the optical system. In the previous large-scale process, the photomask pattern was directly made according to the circuit pattern determined by the circuit design layout file. After the size is reduced, the circuit design layout file is usually used as the input file of the optical proximity correction software, and the circuit board graphics determined by the circuit design layout file (see figure 1 , wherein the outer contour is the metal layer graphics, and the square area with the filled pattern is the lead hole layer graphics) for optical proximity correction, and the graphics are corrected by optic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G03F1/14G03F1/36
Inventor 魏芳
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP