Manufacturing method for semiconductor elements having air gap

Abstract

A method for forming air gaps between interconnect structures in semiconductor devices provides a sacrificial layer formed over a dielectric and within openings formed therein. The sacrificial layer is a blanket layer that is converted to a material that is consumable in an etchant composition that the dielectric material and a subsequently formed interconnect material are resistant to. After the interconnect material is deposited a planarized surface including portions of the dielectric material, vertical sections of the converted material and portions of the interconnect material is produced. The etchant composition then removes the converted material thereby forming voids. A capping layer is formed over the structure resulting in air gaps. A sidewall protection layer may be optionally formed between the interconnect structure and the sacrificial material. In some embodiments an ARC layer may be formed over the dielectric and form part of the planar surface.

Description

technical field [0001] The invention relates to a semiconductor element technology, in particular to an internal connection structure of the semiconductor element and a method for reducing the capacitance between internal connection lines. Background technique [0002] When the semiconductor industry develops the process technology below 90nm, the distance between adjacent interconnection lines becomes smaller and smaller. The semiconductor process replaces the interlayer dielectric layer such as silicon oxide with low dielectric materials to reduce the adjacent interconnection. However, when the process technology evolves to 32-45nm, the problem of capacitance becomes more serious. Known methods to reduce the capacitance between interconnect lines include the use of low dielectric materials such as fluorosilicate glass (FSG), carbon-doped silicon oxide (Black Diamond from Applied Materials), or a dielectric material with a dielectric constant below 2.5. Ultra-low-k (extrem...

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Problems solved by technology

In addition, the cost of ultra-low-k materials is quite high, and when using ultra-low-k materials, quite complicated processes such as sealing processes, UV / electron beam curing or similar processes are required, and these processes will Increased cost and production time per unit of product

Ultra-low dielectric materials have low thermal conductivity (approximately less than 0.2W / m-c), which can hinder heat dissipation and cause electromigration or other thermal-related reliability issues. Therefore, according to the above, there are many shortcoming

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