Multi-path symbol resistant timing synchronization device

A symbol timing synchronization, anti-multipath technology, applied in the field of communication, can solve the problems of synchronization algorithm can not be applied to multipath channel conditions, high implementation complexity, poor timing performance, etc., to achieve easy hardware implementation, simple circuit structure, anti-multiple problems The effect of strong diameter

Active Publication Date: 2009-04-29
NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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Problems solved by technology

[0002] Under flat fading channel conditions, there are many practical and effective symbol timing synchronization algorithms, such as Gardner algorithm, early-early gate algorithm, etc., but these synchronization algorithms cannot be applied under multipath channel conditions
Most of the symbol timing synchronization algorithms suitable for application in multipath frequency selective fading channel conditions are not suitable for application in single-carrier frequency-domain equalization systems; and most of the symbol timing synchronization algorithms suitable for single-carrier frequency-domain equalization systems use decision feedback structure , high implementation complexity, poor timing performance at low SNR

Method used

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  • Multi-path symbol resistant timing synchronization device
  • Multi-path symbol resistant timing synchronization device
  • Multi-path symbol resistant timing synchronization device

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Embodiment Construction

[0021]Referring to Fig. 1 to Fig. 3, the present invention comprises IQ demodulator 1, matched filter 2-1, 2-2, extractor 3-1, 3-2, frame coarse synchronizer 4, shift register 5, shift Register 7, sampling phase coarse timing unit 6, sampling phase tracking unit 8; as shown in Figure 1, Figure 1 is a block diagram of the electrical principle of an embodiment of the present invention, and the embodiment is connected to the circuit according to Figure 1. Among them, the function of IQ demodulator 1 is to demodulate the digital low-IF signal into I road and Q road quadrature baseband oversampled signal; The signal is matched and filtered, and the Q-fold oversampling signal after the matched filter passes through the extractor 3-1, 3-2 to perform Q-fold extraction and then performs coarse frame synchronization, and passes through the shift register 5 to delay and then performs coarse timing of the sampling phase. The third way is to carry out sampling phase tracking after the shif...

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Abstract

The present invention discloses a multipath symbol resistant timing synchronizing device which relates to wideband single carrier modulation continuous communication in communication field and a symbol timing synchronizing device in burst communication. The multipath symbol resistant timing synchronizing device adjusts the timing phase based on the accumulated energy of a plurality of symbol sample values and not the energy of a single symbol sample value. The timing synchronizing of symbol is realized through a blind estimation method in which a coarse symbol timing estimation and a symbol timing tracking are combined. The multipath symbol resistant timing synchronizing device according to the invention has the characteristics of strong multipath resistance, quick synchronizing speed, adaptability for time domain equalization system, adaptability for frequency domain equalization system, full digital circuit realization, etc. The multipath symbol resistant timing synchronizing deviceis especially suitable for being applied for high-speed data communication system of wideband frequency selectively fading wireless channel.

Description

technical field [0001] The invention relates to an anti-multipath symbol timing synchronization device in the field of communication, especially suitable for high-speed single-carrier modulation continuous communication and burst communication systems, time-domain equalization and frequency-domain equalization communication systems of broadband frequency selective fading wireless channels . Background technique [0002] In flat fading channel conditions, there are many practical and effective symbol timing synchronization algorithms, such as Gardner algorithm, early-early gate algorithm, etc., but these synchronization algorithms cannot be applied in multipath channel conditions. Most of the symbol timing synchronization algorithms suitable for application in multipath frequency selective fading channel conditions are not suitable for application in single-carrier frequency-domain equalization systems; and most of the symbol timing synchronization algorithms suitable for sin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L27/26H04L25/03
Inventor 徐信刘利强宋志群
Owner NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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