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Preparation method for plow groove isolation structure capable of avoiding residual silicon oxynitride

A technology of trench isolation and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of semiconductor device scrapping and affecting component performance, and achieve the effect of improving performance

Active Publication Date: 2009-05-27
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
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Problems solved by technology

[0003] However, after the trench isolation structure is manufactured by the above method, silicon oxynitride residues will appear on the active regions between the trench isolation s

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  • Preparation method for plow groove isolation structure capable of avoiding residual silicon oxynitride

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Embodiment Construction

[0019] The fabrication method of the trench isolation structure which can avoid the silicon oxynitride residue of the present invention will be further described in detail below.

[0020] The trench isolation structure described in the method for fabricating a trench isolation structure that can avoid silicon oxynitride residues of the present invention is fabricated on a silicon substrate, and the trench isolation structure is used to isolate semiconductors fabricated on the silicon substrate The components of the device. In this embodiment, the trench isolation structure is a shallow trench isolation structure.

[0021] see figure 1 According to the method for manufacturing a trench isolation structure that can avoid silicon oxynitride residues of the present invention, firstly, step S10 is performed to form a pad oxide layer on the silicon substrate. In this embodiment, the pad oxide layer is formed by an atmospheric pressure chemical vapor deposition process.

[0022] N...

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Abstract

The invention provides a trench isolation structure manufacturing method capable of avoiding silicon oxynitride residue, wherein the trench isolation structure is manufactured on a silicon substrate. In the prior art, heat processing is carried out before the removal of silicon oxynitride and consequently the silicon oxynitride is compact and can not be removed completely so as to influence the performance of elements and an semiconductor device in an active area. The trench isolation structure manufacturing method capable of avoiding silicon oxynitride residue comprises the following steps: firstly, making a lining oxide layer and a protective barrier layer by laminating a silicon oxynitride layer and a silicon nitride layer up and down on the silicon substrate; secondly, carrying out photoetching and etching an isolating trench; thirdly, making an isolation oxide layer on the trench wall of the isolating trench; fourthly, filling the isolating trench through chemical vapor deposition; fifthly, carrying out a chemical and mechanical polishing process to remove the silicon oxynitride layer to form a trench isolation structure; and finally, removing the silicon nitride layer and the lining oxide layer. The trench isolation structure manufacturing method capable of avoiding silicon oxynitride residue can avoid silicon oxynitride residue, thereby greatly improving the performance of the semiconductor device.

Description

technical field [0001] The invention relates to a trench isolation structure manufacturing process, in particular to a trench isolation structure manufacturing method capable of avoiding silicon oxynitride residues. Background technique [0002] When manufacturing a semiconductor device, it is necessary to separate multiple components of the semiconductor device through a trench isolation structure (a shallow trench isolation structure (STI) is generally used now). The manufacturing method of the trench isolation structure in the prior art comprises the following steps: a, making a pad oxide layer on the silicon substrate for making the semiconductor device; b, making a protective barrier layer on the pad oxide layer, the protective barrier layer Including silicon oxynitride layer and silicon nitride layer stacked up and down; c, photolithography and etching out the isolation trench; d, making an isolation oxide layer on the wall of the isolation trench; e, through a high-de...

Claims

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Application Information

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IPC IPC(8): H01L21/762
Inventor 蒋莉黎铭琦姜立维
Owner SEMICON MFG INT (SHANGHAI) CORP