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Low time delay IRA code encoder based on near lower triangular structure check matrix

A technology of check matrix and triangular structure, which is applied to the application of error detection coding of multiple parity bits, error correction/detection using block codes, data representation error detection/correction, etc., which can solve the problem of large coding delay, Problems such as late encoding start time and large transmission delay can be achieved to reduce encoding delay, improve encoding real-time performance, and reduce transmission delay

Inactive Publication Date: 2012-04-25
SHANGHAI JIAOTONG UNIV
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

In 2000, they were further inspired by the irregular LDPC code, and proposed the IRA (Irregular Repeat Accumulate) code, that is, the irregular repeated accumulation code, and proved that the binary IRA code can achieve the same superior performance as the irregular LDPC code, but the coding algorithm The complexity of the code is much lower than that of the LDPC code
However, this method must start to generate check bits after receiving all the information bits, the encoding starts later, and the transmission delay is longer. Not only that, because encoding cannot be performed at the same time as buffering information bits, the encoding delay is also relatively large

Method used

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  • Low time delay IRA code encoder based on near lower triangular structure check matrix
  • Low time delay IRA code encoder based on near lower triangular structure check matrix
  • Low time delay IRA code encoder based on near lower triangular structure check matrix

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Embodiment Construction

[0019] The embodiments of the present invention are described in detail below in conjunction with the accompanying drawings: this embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following the described embodiment.

[0020] The general form of the check matrix of the IRA code is as follows:

[0021]

[0022] The IRA code parity check matrix in the present embodiment is: 1 0 1 0 1 0 0 1 1 0 ...

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Abstract

The invention provides a low time delay IRA code coder for an approximate lower triangular structure based check matrix, which belongs to the technical field of wireless communication, wherein the row exchange treatment of an H1 part of the check matrix is performed by a pretreatment module of the check matrix, so that the H1 part of the check matrix meets the approximate lower triangular structure; an information bit buffer memory module receives information bit of the code ready for coding and temporarily stores the information bit, and immediately controls a signal channel coding module tostart coding after receiving partial information bit; and according to the check matrix after pretreatment, the signal channel coding module starts coding after the information buffer memory module receives the partial information bit. The coder has the advantages of advancing the start time of signal channel coding, reducing transmission time delay, and continuing to receive and temporarily store the information bit while coding; and because the coding and the receiving and temporary store of the information bit are performed at the same time, the working efficiency of the coder is improved,and the coding time delay is reduced.

Description

technical field [0001] The invention relates to a coder in the technical field of wireless communication, in particular to a low-delay IRA code coder based on an approximate lower triangular structure check matrix. Background technique [0002] With the in-depth study of Turbo codes and LDPC codes, channel coding researchers began to pay attention to how to find such a good code for a given channel: 1. Linear time coding; 2. When the code rate is close to the channel capacity , linear time decoding. For Turbo codes, both parallel and serial can be encoded in linear time. However, for LDPC codes, its encoding algorithm has a quadratic relationship with the code length. [0003] In 1998, Divsalar, Jin and McEliece proposed the regular RA (Repeat Accumulate) code, that is, the repeated accumulation code. The structure of the RA coder is very simple, and it is formed by serial cascading of repetition code, interleaver and accumulator. In 2000, they were further inspired by th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/11
Inventor 夏皛周洪源徐友云甘小莺俞晖
Owner SHANGHAI JIAOTONG UNIV