Decoding method, decoding device and decoder

Abstract

The invention discloses a decoding method, a decoding device and a decoder, relating to the field of video treatment, saving system hardware resources, reducing the decoding complexity by a hardware circuit and obviously enhancing the system performance. The decoding method provided by the embodiment comprises the following steps: receiving the data of an input residual matrix; decoding; and obtaining the data of an output residual matrix by two-time inverse transformation of the same type of the data of the input residual matrix and an inverse transformation matrix. The invention is suitablefor any decoding occasion by inverse integer cosine transformation.

Description

technical field [0001] The present invention relates to the field of video processing, in particular to a decoding method, device and decoder. Background technique [0002] Advanced Audio Video Coding Standard (Audio Video Coding Standard, AVS) is the latest digital audio and video codec standard with China's independent intellectual property rights, and the benchmark profile (jizhun profile) has been released. The coding efficiency of AVS is 2 to 3 times higher than that of MPEG-2, which is significantly higher than the baseline profile of H.264. In terms of implementation, the complexity of the AVS encoder is 70% of that of H.264, and the complexity of the decoder is 30% of that of H.264. Vigorously promote the AVS standard of China's independent intellectual property rights, which has good market prospects and research value. [0003] Previous codec technologies such as MPEG-2 usually use DCT (Discrete Cosine Transform) and Inverse Discrete Cosine Transform (IDCT), but ...

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Problems solved by technology

[0010] However, in the process of realizing the present invention, the inventors found that there are at least the following problems in the prior art: when the prior art realizes the above-mentioned decoding process, the inherent characteristics of the AVS inverse integer cosine transform are not considered deeply, and the decoder needs two kinds of type circuits, one is used to realize the above-mentioned horizontal inverse transformation process, and the other is used to realize the above-mentioned vertical inverse transformation process, which takes up too many hardware resources; and the decoder directly performs two complex two-dimensional matrix transformations, and the hardware circuit The implementation complexity is high, the running speed is low, and the system performance is poor

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