Display

Abstract

A display is provided, which includes a timing controller, a data driver, and first and second termination resistors. The timing controller transmits a transmission signal, including at least one of adata signal, a clock signal, and a strobe signal, in a differential format and drives current in a pull mode. The data driver reconstructs the data from the transmission signal. One end of each of the first and second termination resistors is connected respectively between the data driver and terminations of first and second transmission signal lines, each signal line being a path through which the transmission signal is transmitted from the timing controller to the data driver and the other ends thereof are connected respectively to first and second termination voltage sources. Thus, it is possible to more simply implement the timing controller on the transmitting side, and also to increase data transmission efficiency.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2008-0082763 (filed on Aug. 25, 2008) based on 35 U.S.C 119, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to signal processing and, more particularly, to a display comprising a chip on glass (COG), chip on film (COF) or tape carrier package (Tape Carrier) Package) (TCP) source driver, and a timing controller that transmits data and control signals to the source driver. Background technique [0003] With the widespread use of portable electronic devices such as notebook computers and personal portable communication devices, the market demand for digital home appliances and personal computers continues to rise. Displays, which are final connection media between such devices and users, require technologies that enable their weight reduction and power consumption reduction. Recently, users have tended to use flat panel displa...

AI Technical Summary

Problems solved by technology

That is, there is a problem that the transmission terminal 70 needs to include a common-mode voltage regulator 80 as a feedback loop, wherein the common-mode voltage regulator 80 receives the common-mode voltage, and compares the common-mode voltage with the internally generated reference voltage V ref compare and control the dependent current source 74 so that the common mode voltage is always maintained

[0016] In addition, since the output side 70 of the timing controller 14 drives current in a push-pull type, the circuit structure is complicated, and when the current is alternately driven in a push mode and a pull mode, there may be a gap between the push mode and pull mode drivers. time difference, which causes fluctuations in the common-mode voltage

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