Monitoring device
By monitoring the power consumption of the processor to detect task overruns in time-triggered embedded systems, it solves the interference and high cost problems of existing monitoring methods, achieves fast, economical and non-intrusive fault detection, and supports system recovery.
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[0048] The present invention provides an apparatus and method for passively monitoring a processor to detect abnormal behavior.
[0049] In a particular embodiment of the invention, the target processor includes a TTC system. In a TTC system, a task is executed periodically or once within its scheduled processing time or deadline. Such tasks are non-preemptive, meaning that once started they run until completed. This type of system can be implemented in different architectures, such as a hyperloop architecture or a timer-based architecture.
[0050] In a timer-based architecture as employed in the embodiments of the invention described below, an Interrupt Service Routine (ISR) is triggered periodically (typically at each clock cycle interval) to update the timing information for all tasks ( i.e. count down to the moment they should run). The ISR also executes the tasks that should run in that particular clock cycle interval.
[0051] As far as power consumption of such emb...
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Abstract
Description
Claims
Application Information
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