LDPC decoding method combining bit flipping (BF) and majority logic (MLG)
Patent Information
- Authority / Receiving Office
- CN Β· China
- Current Assignee / Owner
- TIANJIN BOWEI TECH
- Publication Date
- 2010-05-12
- Estimated Expiration
- Not applicable Β· inactive patent
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Abstract
Description
technical field
[0001] The invention belongs to the technical field of digital information transmission, in particular to an LDPC decoding method combining bit flipping and large number logic. Background technique
[0002] Low Density Parity Check (LDPC, Low Density Parity Check) code is a channel code widely used in the field of digital information transmission at present. As an ordinary linear block code, LDPC code is usually represented by generator matrix G and check matrix H, and its characteristic is that the number of non-zero elements in parity check matrix H is much smaller than the number of zero elements. In the process of information transmission, the receiving end needs to decode the LDPC code. The LDPC decoding methods mainly include tree decoding, probability decoding, sum product decoding, minimum sum decoding, bit flip decoding and large number logic decoding. All the above-mentioned decoding methods have certain limitations. The bit-flip decoding method i...