Multi-class data cache policies
A data cache, cache technology, applied in electrical digital data processing, memory systems, memory address/allocation/relocation, etc., to achieve the effect of reducing the number of cache misses
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[0015] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present invention.
[0016] System Overview
[0017] figure 1 is a block diagram illustrating a computer system 100 configured to implement one or more aspects of the present invention. Computer system 100 includes central processing unit (CPU) 102 and system memory 104 that communicate via a bus path through memory bridge 105 . The memory bridge 105 can be as figure 1 Integrated into CPU 102 as shown. Alternatively, memory bridge 105 may be a conventional device such as a north bridge chip connected to CPU 102 via a bus. The memory bridge 105 is connected to an I / O (input / output) bridg...
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