Capacitor and manufacture method thereof
A manufacturing method and capacitor technology, applied in the direction of electrical solid-state devices, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of smaller cross-sectional area of metal wires, increased device signal interference, and reduced device quality, so as to reduce inductance, The effect of improving device quality
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[0027] Figure 7 It is a flow chart of a specific embodiment of forming a capacitor in the present invention. Such as Figure 7 As shown, step S11 is performed to provide a semiconductor substrate, a bus line and a ground line are formed on the opposite surface of the semiconductor substrate base, and the bus line is electrically connected to the MOS transistor on the semiconductor substrate;
[0028] Execute step S12, grinding the basal surface of the semiconductor substrate to thin the semiconductor substrate;
[0029] The basal surface of the semiconductor substrate is ground by chemical mechanical polishing, so that the semiconductor substrate is neither too thin to cause bending deformation nor too thick to form conductive plugs therein.
[0030] Executing step S13, forming a first conductive plug penetrating through the semiconductor substrate and communicating with the bus and a second conductive plug communicating with the ground line in the semiconductor substrate; ...
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