Multi-core CPU and inter-core communication method thereof
An inter-core communication and multi-core technology, applied in the field of multi-core CPU and its inter-core communication, can solve the problems of large communication failures and occupying many MAC ports, and achieve the effect of high forwarding performance and high reliability
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[0033] In order to solve the above problems in the prior art, in the embodiment of the present invention, a MAC loopback port is configured on the multi-core CPU, and the buffer (cache) of the MAC loopback port is configured as a shared cache of each core in the multi-core CPU. When one core in a multi-core CPU sends a message to another core, the source core as the sender of the message sends the message carrying the identification information (such as the MAC address) of the destination core to the MAC loopback port, and the MAC loopback After the interface is looped back, it is stored in the shared cache, and the hardware forwarding engine of the shared cache notifies the destination core as the receiver of the message to read the message from the shared cache.
[0034] Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0035] like figure 2 As shown, the multi-core CPU includes a core 1, a core 2, a core...
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