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JTAG (Joint Test Action Group) based synchronous debugging method of multi-chip microprocessor

A debugging method, microprocessor technology, applied in the direction of electrical digital data processing, instrumentation, calculation, etc., to achieve the effect of good reusability

Active Publication Date: 2011-01-05
安徽芯纪元科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is exactly how to perform synchronous JTAG debugging on a multi-processor interconnection system through a single JTAG debugging interface based on the IEEE1149.1 standard

Method used

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  • JTAG (Joint Test Action Group) based synchronous debugging method of multi-chip microprocessor
  • JTAG (Joint Test Action Group) based synchronous debugging method of multi-chip microprocessor
  • JTAG (Joint Test Action Group) based synchronous debugging method of multi-chip microprocessor

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Embodiment Construction

[0017] Such as figure 1 As shown, in an interconnected system with multiple processors, the JTAG links of multiple processor chips are serially connected to one JTAG link in a daisy chain mode, that is, the TDI of the first processor chip chip 1 (test Data input) is connected to the TDI of the off-chip JTAG emulator interface, the TDI of the second chip 2 to the last processor chip chip n is connected to the TDO (Test Data Output, test data output) of the previous processor chip in turn, and finally A TDO of the processor chip is connected to a TDO of the off-chip JTAG emulator interface. The TDI signal and TDO signal of each chip are connected into a serial link. TCK and TMS of the off-chip JTAG emulator interface are connected in parallel with TMS (test clock input) and TCK (test mode selection) of all chips.

[0018] Such as figure 2 As shown, after the JTAG emulator receives the control command, it generates and sends a TMS signal according to the length parameter of t...

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Abstract

The invention discloses a JTAG (Joint Test Action Group) based synchronous debugging method of a multi-chip microprocessor, which comprises the following steps of: connecting JTAG scanning chains by adopting a serial daisy-chain mode; and controlling a TMS (Test Mode Select) signal and a TDI (Test Data Input) signal according to the concrete chip number and the connected JTAG scanning chains, and after all the data are shifted in series onto the corresponding scanning chains, simultaneously changing the state of a TAP (Test Access Port) through the TMS signal, and synchronously loading the data into a corresponding processor kernel-debugging control logic circuit to realize the synchronous debugging operation of all the chips.

Description

technical field [0001] The invention relates to a microprocessor chip debugging method based on the JTAG standard, in particular, the JTAG method is used for synchronous debugging of a system composed of interconnected multi-chip microprocessors. Background technique [0002] As the demand for computing power continues to increase and the development of VLSI technology is approaching its limit, the processing power of a single chip can no longer meet the demand. The multi-processor chip interconnection system provides a solution to the limited computing power of a single chip. It can flexibly expand the number of processors according to needs to obtain higher processing performance. However, multi-processor interconnection increases the complexity of the system, and there is a synchronization relationship between the interconnected processors, so the synchronization debugging problem of multi-processor interconnection system becomes more and more important. [0003] At pres...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/267
Inventor 陆俊峰洪一周乐李岩
Owner 安徽芯纪元科技有限公司
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