Non-volatile memory and read circuit thereof

Abstract

The invention provides a non-volatile memory and a read circuit thereof. The read circuit comprises a mirror image unit, a data read unit, a pre-charging unit and a pre-discharging unit, wherein the mirror image unit is used for generating mirror image current which is the same as bit line current; the data read unit reads data of a memory unit according to the mirror image current; the pre-charging unit and the pre-discharging unit are connected with a bit line; the initial potential of the bit line is compared with a target potential by the pre-charging unit and the pre-discharging unit; and the bit line is charged or discharged to clamp the potential of the bit line to the target potential. By connecting the pre-charging unit and the pre-discharging unit with the bit line, the potential of the suspending bit line can be quickly ascended or descended to the target potential, so logic error is avoided, and data read speed is improved.

Description

technical field [0001] The invention relates to the design field of integrated circuit electrostatic protection circuits, in particular to a reading circuit of a non-volatile memory. Background technique [0002] In non-volatile memory, each storage unit is defined as a binary bit, that is, one of "0" or "1". When reading the binary data value of the storage unit, it usually includes: The connected bit line introduces a read current, and judges the data value of the memory cell according to the magnitude of the read current. Specifically, to generate the above-mentioned read current, it is first necessary to precharge the corresponding bit line to reach a target potential; then select and turn on the memory cell to obtain a stable read current, and compare it with the reference current to read Get the data of the storage unit. [0003] figure 1 A schematic diagram of an existing non-volatile memory read circuit is shown. The basic module of the reading circuit includes: ...

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Problems solved by technology

[0005] The existing reading circuit has the following problems: Usually, in order to facilitate wiring and save device area, the bit line is usually in a floating state before charging, and will not be connected to a fixed potential

However, when the memory is reading data, the order of magnitude of the bit line current is usually only 0.1μA, the discharge speed is slow, and it takes a very long time to wait for the potential of the bit line to fall back, which seriously affects the reading speed of the memory.

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