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Method and device for realizing finite domain multiplication based on serial and parallel combination

A finite field and multiplication technology, applied in the field of finite field multiplication based on serial-parallel combination, can solve problems such as consumption, large resources, and unsuitable cost savings, and achieve the effects of improving efficiency, reducing space complexity, and shortening the critical path

Inactive Publication Date: 2011-09-14
BEIJING UNIV OF POSTS & TELECOMM
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Problems solved by technology

The bit-parallel multiplier has (O(m 2 )) Space complexity, the method has a compact structure, is easy to implement in hardware, can achieve high throughput, and is suitable for today's high-speed communication systems, but it consumes a lot of resources and is not suitable for cost saving

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  • Method and device for realizing finite domain multiplication based on serial and parallel combination
  • Method and device for realizing finite domain multiplication based on serial and parallel combination
  • Method and device for realizing finite domain multiplication based on serial and parallel combination

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Embodiment Construction

[0032] The invention discloses a method for realizing finite field multiplication based on serial-parallel combination. This method is used to realize the multiplication operation of the m-bit multiplication factor A and the m-bit multiplication factor B in the finite field. In order to make the purpose, technical scheme and The advantages are clearer, and the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0033] figure 1 is a flowchart of a method for realizing finite field multiplication based on serial-parallel combination in the present invention, such as figure 1 Shown:

[0034] Step 101, grouping the multiplication factors A of m bits from low to high, with k bits as a group, divided into p groups, and each group after grouping is expressed as e i ,in i=0,1,...,p-1;

[0035] Step 102, set e 0 Multiply with the multiplicative factor B in the finite field to get D' 0 ; will D' 0 Make C' ...

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Abstract

The invention discloses a method and device for realizing finite domain multiplication based on serial and parallel combination. The method comprises the steps of: dividing m sites of multiplication factors A into p groups from low site to high site by taking k sites as a group, wherein each group obtained after group division is presented as ei, [m / k]=p and i=0, 1, ......, p-1; subjecting e0 and multiplication factors B to multiplication in a finite domain to obtain D0; outputting D'0 as C'1 in a next step; subjecting the multiplication factors B to k-site left shift operation in the finite domain to obtain E<1>; subjecting ej and E<j> to the multiplication in the finite domain to obtain D'j; subjecting D'j and C'j to additive operation in the finite domain to obtain C'j+1; subjecting E<j> to the k-site left shit operation in the finite domain to obtain E<j+1>, wherein j=1, 2, 3......, p-2; subjecting ep-1 and Ep-1 to the multiplication in the finite domain to obtain D'p-1; subjecting D'p-1 and C'p-1 to the additive operation in the finite domain to obtain C'p; and outputting the C'p which is a product of the multiplication factors A and the multiplication factors B in the finite domain. By means of the technical scheme disclosed by the invention, the operation efficiency of the finite domain multiplication can be increased.

Description

technical field [0001] The invention relates to the field of information technology, in particular to a method and device for realizing finite field multiplication based on serial-parallel combination. Background technique [0002] Finite field operations are widely used in the fields of error control and cryptography. Especially in encryption and authentication algorithms, finite field operations are widely used, which refers to two types of operations performed under specific rules: addition operations and multiplication operations. [0003] The finite field GF(2) contains only two elements 0 and 1, and the addition operation can be easily realized by using an XOR gate, while the multiplication operation can also be easily realized by using an AND gate. In particular, the finite field GF(2 m ) can be regarded as the m-dimensional expansion field of GF(2), including 2 m elements. At this time, finite field addition can be realized by m XOR gates, while the realization o...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/72
Inventor 寿国础毛泽湘白岩张学茹胡怡红郭志刚
Owner BEIJING UNIV OF POSTS & TELECOMM
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