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Multi-core adaptive way prediction algorithm based on Cache division

A way prediction and self-adaptive technology, applied in the field of self-adaptive way prediction algorithm based on Cache division under multi-core, can solve the problem of reducing the dynamic energy consumption of Cache, so as to reduce Cache power consumption, reduce Cache access power consumption, and reduce Cache way number effect

Inactive Publication Date: 2011-09-21
BEIJING UNIV OF TECH
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AI Technical Summary

Problems solved by technology

However, there is currently no way prediction method used to reduce the dynamic energy consumption of the Cache in a multi-core processor environment.

Method used

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  • Multi-core adaptive way prediction algorithm based on Cache division
  • Multi-core adaptive way prediction algorithm based on Cache division
  • Multi-core adaptive way prediction algorithm based on Cache division

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Experimental program
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Embodiment Construction

[0036]Taking an on-chip multi-core processor with a two-level Cache structure as an example, the adaptive path prediction algorithm of the present invention will be described in detail below.

[0037] The configuration is shown in Table 1:

[0038]

[0039] Table 1

[0040] The specific algorithm flow:

[0041] (1) Initialize the way division table and the way prediction table: the L2Cache division algorithm used is the LRU replacement algorithm, and the result of L2Cache division is stored in the way division table. The size of the way partition table row is determined by the number of processor cores contained in the multi-core processor, such as figure 1 As shown, the way division table has 4 rows and 5 columns, each row corresponds to a processor core, and each column stores the number of the way in the L2Cache occupied by the processor core. figure 1 The processor core0 is divided into three L2Cache ways numbered 000, 001, and 010; taking the multi-core processor in...

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Abstract

The invention relates to a multi-core adaptive way prediction algorithm based on Cache division and belongs to the field of computer system structures. At present, a low-power-consumption and thermal optimization design becomes a core problem of the micro processor research. By a multi-core structure of a multi-core processor, a relevant power-consumption research is a rather important subject. By using a partial theory of program running and aiming at a multi-core processor environment, the Cache division is combined with way prediction of Cache; and by the adoption of the adaptive way prediction algorithm on a result of the Cache division, the aim of reducing the Cache power consumption is fulfilled on the premise of keeping the conventional system performance balanced.

Description

technical field [0001] The invention belongs to the field of computer architecture, and in particular relates to an adaptive path prediction algorithm based on Cache division under multi-core. Background technique [0002] The rapid development of semiconductor technology makes the integration of microprocessors more and more high. At the same time, the surface temperature of processors becomes higher and higher and increases exponentially. The power consumption density of processors can double every three years. At present, low power consumption and thermal optimization design have become the core issues in microprocessor research. The multi-core structure of the multi-core processor determines that its related power consumption research is a crucial topic. At present, the power consumption saving at the processor architecture level is mainly aimed at the Cache, and the purpose of reducing the system power consumption is achieved by reducing the dynamic and static energy c...

Claims

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Application Information

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IPC IPC(8): G06F12/08G06F12/0877
CPCY02B60/1225Y02D10/00
Inventor 方娟郭媚
Owner BEIJING UNIV OF TECH
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