Method for analytically calculating power consumption of coupled interconnection

Abstract

The invention discloses a method for analytically calculating the power consumption of coupled interconnection, and the method can be used for calculating the power consumption of coupled interconnection generated in the early stage of integrated circuit design engineering. The method comprises the following specific steps: (1) recording process nodes; (2) storing interconnection information; (3)calculating component values; (4) judging the type of an input voltage: in case the input voltage is a simple input voltage, executing a step (5), and in case the input voltage is a complex input voltage, executing a step (7); (5) inputting the simple input voltage; (6) calculating the simple input power consumption; (7) inputting the complex input voltage; and (8) calculating the complex input power consumption. The method disclosed by the invention has the advantages that because the coupling effect of interconnection is contained, the calculation result of the power consumption is more accurate; and because the power consumption of interconnection is calculated by using process node data generated in the early stage of designing an integrated circuit, the design efficiency of the integrated circuit is improved.

Description

technical field [0001] The invention belongs to the field of electronic technology, and further relates to a method for calculating interconnection power consumption of VLSI in the field of microelectronic integrated circuits. The invention can be used in the early stage of the integrated circuit design project, considering the coupling situation, to obtain the power consumption of the interconnection line by fast approximate calculation. Background technique [0002] In the VLSI design process, power consumption has become one of the most important design parameters. With the shrinking of IC process nodes, power consumption has become the main factor limiting the performance of integrated circuits. Interconnect power consumption of integrated circuits is the main source of power consumption. And due to the development of technology, the parasitic effect of interconnection is gradually enhanced, and this proportion is increasing. In order to predict the relatively accurate...

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Problems solved by technology

[0007] The common deficiency of the two methods disclosed in the above two papers is that the interconnection is only abstracted into a lumped circuit, and it does not take into account the strong coupling effect between the interconnections of integrated circuits in current practice, which makes the calculation results inconsistent. accurate

The increase in circuit parasitic parameters brought about by the interconnection coupling effect will increase the value of interconnection power consumption, so when considering the actual interconnection coupling effect, the interconnection power consumption value obtained by using the calculation methods in the above two papers Compared with the actual interconnection power consumption value, the error is relatively large

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