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A mixed-radix FFT/IFFT implementation device and method with variable number of points

An implementation method and mixed base technology, applied in the direction of complex mathematical operations, etc., can solve problems such as complex control logic and troublesome control unit implementation

Inactive Publication Date: 2011-12-28
ZHEJIANG UNIV
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Problems solved by technology

Compared with the above two types of algorithms, the former has an advantage in the amount of calculation, and the use of multipliers is less than the latter, but the control logic is more complicated, and the control unit is relatively troublesome to implement

Method used

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  • A mixed-radix FFT/IFFT implementation device and method with variable number of points
  • A mixed-radix FFT/IFFT implementation device and method with variable number of points
  • A mixed-radix FFT/IFFT implementation device and method with variable number of points

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Embodiment Construction

[0040] Such as figure 1 As shown, the mixed-radix FFT / IFFT implementation device with variable points includes modules: input data transformation module, storage module A, data selector, butterfly operation module, overflow detection module, storage module B, shift module, output data transformation module and control module, the input data conversion module is connected with the storage module A, data selector, butterfly operation module, overflow detection module, storage module B, shift module in sequence, the storage module B is connected with the output data conversion module, and the shift module It is connected with the data selector; under the control of the control module, according to whether the operation is FFT or IFFT, the serial input data is stored in the storage module A after the real part and the imaginary part are transformed, and then the control module controls all the data in the storage module A to complete The first-stage butterfly operation, the butter...

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Abstract

The invention discloses a mixed-radix FFT / IFFT realization device and method thereof with variable points. The present invention is a dual-purpose system of FFT and IFFT, which realizes that the number of points can be allocated; two blocks of RAM are used in the transformation process, one of which only stores input data, and when each operation completes its first-level butterfly operation, the RAM can be used to Accept the data of the next operation, and save time when completing multiple consecutive operations; in addition, the method of combining base 4 and base 2 is used to realize the number of points of the L power of 2 (L is a positive integer greater than or equal to 3) FFT and IFFT operations, in the butterfly operation, use block floating-point operations, which solves the data bit width expansion caused by multiplication and addition in the butterfly operation process, saves storage space, and at the same time performs original address storage operations on the results to achieve approximation of interstage flow. The method and device have the characteristics of simple control, high efficiency, flexible configuration, good scalability and the like.

Description

technical field [0001] The invention relates to a device and a method for implementing a mixed-radix FFT / IFFT with variable points. Background technique [0002] Discrete Fourier transform (DFT) is the most basic and commonly used operation in the field of digital signal processing. We can use DFT to perform digital spectrum analysis or digital filtering on signals. In addition, it will also be used in the design and implementation of various digital systems. Use DFT. However, in the initial stage of the DFT operation, there was no good algorithm proposed, so the computational complexity of completing the DFT of N-point data is O(N 2 ); until 1965, Cooley and Tukey published the article "Analgorithm for the machine computation of complex Fourier series" in "Mathematics of Computation", marking the official birth of the Fast Fourier Transform (FFT) algorithm. [0003] The introduction of the FFT algorithm is regarded as an important milestone in the history of digital signa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/14
Inventor 李云飞赵民建王勇松侯维玮李立言王悦
Owner ZHEJIANG UNIV
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