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Controller interface capable of automatically detecting WGIN input and control method

An automatic detection and controller technology, applied in the direction of a single input port/output port register, instrument, time register, etc., can solve the problems of process interruption, frame loss, frequent interruption times, etc., to solve the interruption method. Effect

Active Publication Date: 2012-01-18
HANGZHOU SYNOCHIP DATA SECURITY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

1. Wiegand’s reception has relatively high real-time requirements on time. If you use the query method to receive, frame loss will occur: suppose the main program is pointing to other tasks when the query finds that DATA0 is 0, and when the main program finishes executing the task DATA0 has changed to 1, then this will lead to a loss of 0bit, and the card number read in this way must fail the parity check, so it shows that the CPU cannot receive the card number sent by the ID module
2. Although there will be no data loss in the way of external interruption, the number of interruptions is too frequent. For example, Wiegand 26 needs to be interrupted 26 times, and Wiegand 34 needs to be interrupted 34 times. This will cause the user's process to be often interrupted. Affects the continuity of program progress

Method used

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  • Controller interface capable of automatically detecting WGIN input and control method
  • Controller interface capable of automatically detecting WGIN input and control method
  • Controller interface capable of automatically detecting WGIN input and control method

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Embodiment Construction

[0023] Below in conjunction with accompanying drawing and embodiment the present invention will be further described:

[0024] Please refer to Figure 4 As shown, the Wiegand module is connected to the bus bridge to transmit signals with the core CPU. The core CPU transmits a clock module to the Wiegand module through the bus bridge, and the Wiegand frequency divider (WGIN prescaler) divides the frequency to obtain a reference clock for the Wiegand module to work. Two external GPIO ports (WGIN_DATA0, WGIN_DATA1) receive external signals, sample data through the sampling clock, collect data consistent with the preset data length (WGIN data length), and store it in the register WGINH_RESULT (WGIN result high 32 bit register) and WGINL_RESULT (lower 32-bit register of WGIN result), an interrupt is generated at this time, and the interrupt enable control is passed to the core CPU.

[0025] Users can realize Wiegand signal reception by configuring some simple registers. The regi...

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PUM

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Abstract

The invention relates to a control method of a controller interface capable of automatically detecting WGIN input. A WGIN module is attached to a bus bridge and is in signal connection with a kernel CPU (Central Processing Unit) through the bus bridge, the kernel CPU transfers a clock module to the WGIN module through the bus bridge, and a reference clock which can be supplied to the WGIN for work is formed through a WGIN prescaler in a frequency division way; two external GPIO (General Purpose Input / Output) ports are used for carrying out data sampling by a sampling clock, acquiring data with the length consistent with preset data length and storing the data in a register WGINH_RESULT and a register WGINL_RESULT, an interrupt is generated at the time, and whether the interrupt is delivered to the kernel CPU is judged under the control of interrupt enable. The controller interface and the control method disclosed by the invention have the beneficial effects that: a WGIN level signal is automatically received by the hardware without the need of polling the level states of the GPIO ports by a main program, therefore the phenomenon of data loss can be avoided, and the defects in an inquiring manner are overcome; and according to the configuration of users, the hardware can be subjected to once interrupt after receiving all data, therefore the progress cannot be influenced by frequency interrupt, and the defects of an interrupt manner are overcome.

Description

technical field [0001] The invention relates to an access control system, in particular to a controller interface and a control method for automatically detecting Wiegand input. Background technique [0002] The Wiegand protocol is an internationally unified standard and a communication protocol developed by Motorola. It applies to many characteristics of readers and cards involved in access control systems. It has many formats, the standard 26-bit should be the most commonly used format. In addition, there are 34-bit, 37-bit and other formats. The standard 26-bit format is a widely used industry standard and is open to all HID (Human Interface Device) users. Almost all access control systems accept the standard 26-Bit format. [0003] The Wiegand data output consists of two wires, namely DATA0 and DATA1; the two wires output '0' or '1' respectively. When outputting '0': a negative pulse appears on the DATA0 line; when outputting '1': a negative pulse appears on the DAT...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/24G07C9/00
Inventor 马震伟吴婷
Owner HANGZHOU SYNOCHIP DATA SECURITY TECH CO LTD
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