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s-bus single bus communication circuit

An s-bus, 1.s-bus technology, applied in the bus network, data exchange through path configuration, etc., can solve the problems of complex timing, difficult to achieve, etc., to save space, reduce size, and adapt to high temperature working environment. Effect

Active Publication Date: 2015-12-09
BC P INC CHINA NAT PETROLEUM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If there is no built-in 1-wirebus function in the microprocessor, and the analog 1-wirebus communication is used, the timing is more complicated and difficult to implement

Method used

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  • s-bus single bus communication circuit

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Embodiment Construction

[0017] The present invention uses six reverse three-state buffers / line drivers 74 / 54HC368 to buffer the Tx and Rx of the microprocessor SCI bus for output or input, and then utilizes the switching characteristics of high-speed MOS field effect transistors to realize the isolation of the s-bus single bus Input and output, bus send / receive control is realized by microprocessor I / O port. The bus protocol complies with the RS-232 communication protocol, and the bus signal is CMOS level. circuit such as figure 1 As shown, the s-bus single communication bus is connected to the drain of the first NMOS transistor M1 and the gate of the PMOS transistor M3 through the resistor R1, and the s-bus single communication bus is also directly connected to the source of the PMOS transistor M3 and the second NMOS transistor M2 drain connection. The source of the second NMOS transistor M2 is connected to the drain of the PMOS transistor M3, and the gate of the second NMOS transistor M2 is groun...

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Abstract

The invention discloses a single-bus (s-bus) communication circuit, wherein a setting signal of an MCU (Microcontroller Unit) is respectively connected with a grid of an NMOS (N-type Metal-Oxide Semiconductor) pipe (M1) and a grid of an NMOS pipe (M2); an s-bus is respectively connected with a drain electrode of the NMOS pipe (M1), a grid of a PMOS (P-type Metal-Oxide Semiconductor) pipe (M3), a source electrode of the PMOS pipe (M3) and a drain electrode of the NMOS pipe (M2); a source electrode of the NMOS pipe (M2) is earthed; a drain electrode of the PMOS pipe (M3) is connected with the source electrode of the NMOS pipe (M2); the MCU sends out a signal to connect with a first input end of a reverse three-state buffer; the source electrode of the NMOS pipe (M2) is connected with the second input end of the reverse three-state buffer; the MCU sends out a control signal to connect with a first control end of the reverse three-state buffer; the second control end of the reverse three-state buffer is earthed; the first output end of the reverse three-state buffer is connected with the source electrode of the NMOS pipe (M2), and the MCU receives a signal (MCUSCI-Rx) to connect with a second output end of the reverse three-state buffer. With the adoption of the circuit provided by the invention, the SCI (Serial Communications Interface) bus of a singlechip is converted into a passive single bus, so that the asynchronous serial quasi-duplex communication can be realized.

Description

technical field [0001] The invention relates to the field of electronic circuits, in particular to an s-bus single-bus communication circuit. Background technique [0002] Most buses are constructed in the same way, differing only in the number of data and address lines and the number and function of the control lines in the bus. According to different connection methods, there are three basic types of bus structures used in the control system: single bus structure, double bus structure and multi-bus structure. [0003] A single bus is suitable for a single master system capable of controlling one or more slave devices. The master can be a microcontroller (MCU), and the slave can be a single-bus device or a slave microcontroller, and the data exchange between them only passes through one signal line. When there is only one slave device, the system can operate as a single-node system; when there are multiple slave devices, the system can operate as a multi-node system. [...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/40
Inventor 李童宋涛王珺杨亚萍柏爱川左兴龙祝环芬王俊白岩王俊超贾桑
Owner BC P INC CHINA NAT PETROLEUM CORP