Vector dot product accumulating network supporting reconfigurable fixed floating point and configurable vector length

Abstract

The invention discloses a vector dot product accumulating network supporting reconfigurable fixed floating point and configurable vector length, comprising a parallel reconfigurable multiplying unit for receiving vectors B, C, FBS and U as input, and performing vector multiplying operation to obtain multiplying result B*C of the vectors B and C; a floating point index and mantissa pre-processing part for receiving multiplying result B*C of the parallel reconfigurable multiplying unit and scalar A as input, finishing operations of selecting maximum floating point index, subtracting the indexes, shifting and aligning, complementing bits and converting and sticky compensating to obtain processed vector result B*C and scalar result A; a reconfigurable compressor for receiving processing result of the floating point index and mantissa pre-processing part, and compressing the result to obtain a sum string S and a binary string C; and a floating point index and mantissa post-processing/fixed point operating part for receiving the sum string S and the binary string C of the reconfigurable compressor, and finishing mantissa addition and post-processing to obtain a final vector dot product accumulating result.

Description

technical field [0001] The invention relates to the technical field of high-performance digital signal processors, in particular to a vector point accumulation and addition network with configurable vector length supporting fixed-floating point reconfiguration. Background technique [0002] In the field of modern digital signal processing, digital signal processor (DSP) is the core of the whole system, and the performance of DSP directly determines the performance of the whole system. In DSP, no matter how complicated the calculation is, it must be implemented by the calculation unit, so the calculation unit is the core component of the entire DSP, and its computing power is the main indicator to measure the performance of the DSP. In particular, with the continuous development of technology, high computing-intensive fields represented by modern radar signal processing, satellite image processing, image compression, high-definition video, etc., have higher and higher signal ...

AI Technical Summary

Problems solved by technology

[0004] 1) Low hardware utilization

For vector dot product operations, only scalar multiplication, accumulation or scalar multiplication and accumulation resources are used, and vector operation resources are not reasonably used

[0005] 2) Weak processing ability

Generally, only 16 / 32-bit scalar dot product operations can be performed. For vector dot products, only multiple scalar dot product operations can be performed. The data throughput is low and the efficiency is low.

[0006] 3) Long execution cycle

[0007] 4) The flexibility is not high

It can only support a specific data format or a specific length of dot product operation, and the number of data participating in the dot product operation is not configurable

[0008] 5) Difficulty programming

Patent Application No. 201010559300.5 "Multifunction for SIMD Vector Microprocessor" introduces an idea of ​​vector floating-point multiplication and addition unit implementation, but it does not reconstruct fixed-point data and also participates in multiplication and addition operations. The number is not configurable

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