Supercharge Your Innovation With Domain-Expert AI Agents!

rf snubber circuit with dynamic bias

一种缓冲器、电路的技术,应用在具有逻辑功能的逻辑电路、逻辑电路、使用场效应晶体管的逻辑电路耦合/接口等方向

Active Publication Date: 2016-03-16
QUALCOMM INC
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The wide swing applied to the buffer causes it to be higher than the ideal gate-to-drain voltage V on the transistors of the buffer circuit GD and the gate-to-source voltage V GS , thereby stressing these transistors and creating reliability issues due to both hot carrier injection (HCI) and gate oxide breakdown
Reliable operation is paramount and becomes more challenging due to the use of deep sub-micron processes

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • rf snubber circuit with dynamic bias
  • rf snubber circuit with dynamic bias
  • rf snubber circuit with dynamic bias

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] The detailed description given below in conjunction with the accompanying drawings is intended as a description of exemplary embodiments of the invention and does not represent the only embodiments with which the invention can be practiced. The word "exemplary" is used in this description to mean "serving as an example, instance or illustration" and should not necessarily be considered preferred or advantageous over other exemplary embodiments. The detailed description includes specific details for the purpose of providing a thorough understanding of the exemplary embodiments of the invention. It will be apparent to those skilled in the art that the exemplary embodiments of the invention may be practiced without the use of these specific details. In some instances, well-known structures and devices are shown in block diagram form in order to avoid obscuring the novelty of the exemplary embodiments presented herein.

[0018] The present invention relates to buffer circu...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

An RF buffer circuit for a voltage controlled oscillator (VCO) includes a dynamic bias circuit to selectively invert the phase of the output voltage waveform. In a CMOS implementation, a PMOS / NMOS pair is used on the output path. During high (voltage) swing mode conditions, the phase of the output is inverted so that the output waveform is in phase with the voltage appearing at the gate of the PMOS / NMOS pair. This technique thereby reduces the peak gate-to-drain voltage and allows for improved reliability of MOS devices employing configurations that withstand low phase noise and low power consumption.

Description

technical field [0001] The present invention generally relates to RF buffer circuits used in conjunction with RF components such as voltage controlled oscillators (VCOs). Background technique [0002] Voltage controlled oscillators are well known devices used in a wide variety of RF electronics applications, such as frequency synthesizers for RF communication systems. Regardless of new developments in their design, VCOs are still considered one of the most critical design components in RF transceivers. Typically, the most important parameters of a VCO are phase noise, power consumption, and frequency tuning range. Output buffer circuits are often used to amplify the output of a VCO and isolate the VCO from load conditions. [0003] To meet the stringent phase noise specifications in 3G wireless communication standards (such as those in CDMA1X and other protocols), existing VCOs generate differential output voltages with wide swings (typically up to 3V). This wide voltage ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H03K17/687H03K19/0185H03K19/20H03K19/003
CPCH03K17/6872H03K19/00361H03K19/018521H03K19/20H03K17/687
Inventor R·兰加拉詹C·米什拉
Owner QUALCOMM INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More