Semiconductor and fabrication method thereof

Abstract

A semiconductor device having a substrate including a major surface, a gate stack comprising a sidewall over the substrate and a spacer over the substrate adjoining the sidewall of the gate stack. The spacer having a bottom surface having an outer point that is the point on the bottom surface farthest from the gate stack. An isolation structure in the substrate on one side of the gate stack has an outer edge closest to the spacer. A strained material below the major surface of the substrate disposed between the spacer and the isolation structure having an upper portion and a lower portion separated by a transition plane at an acute angle to the major surface of the substrate. The present invention also relates to a fabrication method of the semiconductor.

Description

technical field [0001] This invention relates to integrated circuit fabrication and, more particularly, to semiconductor devices with strained structures. Background technique [0002] As semiconductor devices such as metal-oxide-semiconductor field-effect transistors (MOSFETs) are scaled down to various technology nodes, high-k gate dielectric layers and metal gate electrode layers are integrated into the gate stack of MOSFETs, thereby reducing the Small device size to improve device performance. In addition, by selectively growing silicon germanium (SiGe), the strained structure in the MOSFET's source and drain (S / D) cavities can be exploited to enhance carrier mobility. [0003] However, in complementary metal-oxide-semiconductor (CMOS) manufacturing, there are certain difficulties in realizing the above components and processes. The above-mentioned problems are exacerbated as the gate length and the spacing between devices decrease. For example, it is difficult to inc...

AI Technical Summary

Problems solved by technology

For example, it is difficult to increase the carrier mobility of a semiconductor device because strained materials cannot transfer a given amount of strain into the channel region of the semiconductor device, thereby increasing the possibility of device instability and / or device damage

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