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amplifier sense

A sense amplifier, memory technology, applied in instruments, static memory, digital memory information, etc., can solve the problems of slow read operation and time-consuming

Active Publication Date: 2015-08-12
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, developing the full swing, especially if the read bitline is heavily loaded by connecting the bitline to a large number of memory cells, takes time
Waiting for the full swing to be developed before sensing results in slow read operations

Method used

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Embodiment Construction

[0033] Embodiments or examples shown in the drawings are disclosed below using specific language. It should be understood, however, that these embodiments and examples are not intended to be limiting. Any alterations and modifications in the disclosed embodiments, and any further application of the principles of the present disclosure are contemplated as would normally occur to one of ordinary skill in the art. Reference numerals may be repeated throughout the embodiments, but even though the embodiments use the same reference numerals, there is no requirement that components from one embodiment be applied to another embodiment.

[0034] Some embodiments have one or a combination of the following features and / or advantages. Since fluctuations are prevented, the generated reference voltage is stable. During a memory access using a read bit line in a sensing scheme, the read bit line is idle. Therefore, no additional circuitry and die area is required for reference bit lines ...

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Abstract

A circuit comprises a first read bit line, a second read bit line, and a sense amplifier. First and second read bit lines couple a plurality of memory cells and a reference cell of a memory array, respectively. The sense amplifier is configured to receive the first read bit line as a first input and the second read bit line as a second input. When a memory cell of the first plurality of memory cells is read, the memory cell is read activated, the first reference cell is configured to be off, the second reference cell is configured to be on, and the sense amplifier is configured to provide an output reflecting a data logic stored in the memory cell based on a voltage difference between a first voltage of the first read bit line and a second voltage of the second read bit line.

Description

technical field [0001] The present invention relates to amplifier sense. Background technique [0002] Typically, single-ended sensing for SRAM memory cells requires the full swing of the read bit line. However, developing the full swing, especially if connecting the bit line to a large number of memory cells results in a large load on the read bit line, takes time. Waiting for the full swing to be developed before sensing results in slow read operations. Contents of the invention [0003] In order to solve the above problems, the present invention proposes a circuit, comprising: a first read bit line connected to a plurality of first memory cells and a first reference cell of the first memory array; the first read bit line has a first read bit line voltage; a second read bit line, connected to a plurality of second memory cells of the second memory array and a second reference cell; the second read bit line has a second read bit line voltage; and a sense amplifier confi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/06G11C11/413
CPCG11C11/412G11C11/413G11C11/419
Inventor 王兵
Owner TAIWAN SEMICON MFG CO LTD