High-performance full-adder arithmetic element circuit

Abstract

The invention provides a full-adder arithmetic element circuit. The full-adder arithmetic element circuit comprises a first-order gate circuit, a second-order gate circuit and a third-order gate circuit, wherein the first-order gate circuit comprises an NOR gate 1, an NOR gate 2, an NOR gate 3 and an NOR gate 4, the inputs of the four NOR gates are respectively as follows: (A, B), (B, Cin), (A, Cin), and (A, B, Cin), wherein the A, B and Cin are three one-bit binary input signals, and the outputs of the four NOR gates are respectively as follows: Y11, Y12, Y13, and Y14; the second-order gate circuit comprises an NOR gate 5, an NOR gate 6, an NOR gate 7 and an NOR gate 8, the inputs of the four NOR gates are respectively as follows: (A, Y11, Y13), (B, Y11, Y12), (Cin, Y12, Y13), and (Y11, Y12, Y13), and the outputs of the four NOR gates are respectively as follows: Y21, Y22, Y23, and Cout; and the third-order gate circuit comprises an NOR gate 9, the input of the NOR gate 9 is (Y21, Y22, Y23, Y14), and the output of the NOR gate 9 is S.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a high-performance full adder arithmetic unit circuit. Background technique [0002] In the fields of logic control and numerical calculation, a large number of addition and multiplication operations are required. The full adder is the basic unit circuit to realize these operations, and it is widely used in many integrated circuit chips. [0003] With the rapid development of information technology, the requirements for the working speed and circuit cost of various control components and computing devices continue to increase, and various improved circuits continue to appear. [0004] However, many improved circuits have not effectively improved the internal circuit structure of the full adder from the gate level, increased its operating speed, and reduced its circuit implementation cost. [0005] This invention is funded by the National Natural Science Foundation of...

AI Technical Summary

Problems solved by technology

[0004] However, many improved circuits have not effectively improved the internal circuit structure of the full adder from the gate level, increased its operating speed, and reduced its circuit implementation cost.

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