A mixed crystal plane strain si strain sige planar bicmos integrated device and its preparation method
A technology of mixed crystal planes and integrated devices, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., and can solve problems such as low mobility and improved frequency characteristics of BiCMOS integrated circuits
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0100] Embodiment 1: Preparation of 22nm mixed crystal plane strained Si, strained SiGe planar BiCMOS integrated device and circuit, the specific steps are as follows:
[0101] Step 1, SOI substrate material preparation.
[0102] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si wafer with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0103] (1b) Select the P-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;
[0104] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;
[0105] (1d) SiO on the surface of the lower and upp...
Embodiment 2
[0149] Embodiment 2: Preparation of 30nm mixed crystal plane strained Si, strained SiGe planar BiCMOS integrated device and circuit, the specific steps are as follows:
[0150] Step 1, SOI substrate material preparation.
[0151] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si wafer with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0152] (1b) Select the P-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the lower layer;
[0153] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the substrate material of the lower layer and the upper layer of the active layer after injecting hydrogen, respectively;
[0154] (1d)...
Embodiment 3
[0198] Embodiment 3: Preparation of 45nm mixed crystal plane strained Si, strained SiGe planar BiCMOS integrated device and circuit, the specific steps are as follows:
[0199] Step 1, SOI substrate material preparation.
[0200] (1a) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0201] (1b) Select the P-type doping concentration as 5×10 15 cm -3 The Si wafer with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower layer;
[0202] (1c) Using a chemical mechanical polishing (CMP) process to polish the lower layer and the surface of the upper substrate material after hydrogen injection;
[0203] (1d) SiO on the surface of the lower and upper substrate ...
PUM
| Property | Measurement | Unit |
|---|---|---|
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More 