3results about How to "Improve gate control ability" patented technology

The application discloses a kind of copolymer organic semiconductor devices based on isolation and interconnection and preparation method, including substrate, photoetching blocking layer, insulating isolation layer, N organic field effect transistor and N-1 interconnection line;Photoetching blocking layer includes isolation layer and inorganic dielectric layer;Isolation layer is opened with N longitudinal through isolation groove along length direction;Inorganic dielectric layer includes lower dielectric layer and upper dielectric layer;Lower dielectric layer is located in N isolation, and upper dielectric layer is laid on the top of isolation layer and lower dielectric layer;Each organic field effect transistor includes semiconductor layer, source, drain and gate;Semiconductor layer is laid in the isolation groove at the bottom of corresponding lower dielectric layer section, and its material is organic copolymer.The application effectively utilizes isolation groove and photoetching blocking layer, and the semiconductor layer of different semiconductor materials is wrapped and isolated, so as to realize the integration of different organic field effect transistors on the same substrate, and the organic field effect transistor can realize effective interconnection.

The application provides a semiconductor device and a manufacturing method thereof, and an electronic device. The manufacturing method of the semiconductor device comprises the following steps: manufacturing a plurality of bit lines, the plurality of bit lines are sequentially distributed along a second direction; manufacturing a first dielectric layer covering the plurality of bit lines; sequentially manufacturing a sacrificial layer and a second dielectric layer covering the first dielectric layer; forming a plurality of first through holes penetrating through the second dielectric layer, the sacrificial layer and the first dielectric layer and being arrayed and distributed; the bottom of the first through hole is exposed to the bit line; removing part of the second dielectric layer and part of the first dielectric layer arranged around the periphery of the first through hole to form a first channel; manufacturing a plurality of semiconductor columns; the semiconductor columns correspond to fill the first through hole and the first channel arranged around the periphery of the first through hole; replacing the sacrificial layer with a plurality of gate insulating layers and a plurality of gates arranged around the periphery of the plurality of semiconductor columns to obtain a plurality of transistors. The application realizes the improvement of the gate control area and the gate control ability, effectively increases the on-state current, and improves the on-off ratio of the device.

This invention provides a low-voltage, high-linearity heterojunction HEMT device based on junction field-effect modulation, comprising a substrate, a buffer layer, and a multilayer heterostructure of at least two alternating layers of barrier and channel layers. Source and drain electrodes are located on either side of the barrier layer and extend into the buffer layer. A passivation layer is formed on the upper surface of the barrier layer. A gate trench is formed in the middle region of the passivation layer, extending through the passivation layer to the upper surface of the barrier layer. The gate electrode includes multiple discrete gate pillars and a gate cap. The multiple discrete gate pillars are periodically arranged along the gate width direction, located within the gate trench, and extend through at least two alternating layers of barrier and channel layers into the buffer layer. The gate cap is located on the upper surface of the multiple discrete gate pillars, supported by the pillars, and has no contact with the passivation and barrier layers. A metal interconnect layer is electrically connected to the source and drain electrodes. This design achieves both low subthreshold swing and meets the application requirements of low power consumption and high linearity.