Surrounding gate nanowire field effect transistor and preparation method thereof

Abstract

The invention provides a surrounding gate nanowire field effect transistor and a preparation method thereof. The preparation method comprises the following steps of S1, forming a first fin body isolated from a substrate on the substrate, wherein the first fin body consists of a first region, a second region and a third region which are connected in sequence in the length direction; S2, forming a nanowire structure in the second region of the first fin body; and S3, forming an interface oxide layer, a ferroelectric layer and a gate which are laminated around the exposed surface of the nanowirestructure in sequence, wherein the preparation method also comprises the following steps of forming a source/drain in the first region and the third region, wherein the source/drain is connected withthe two ends of the nanowire structure. By virtue of the preparation method, the gate control capability of the device is improved, electric leakage of the device is lowered, source/drain parasitic resistance of the device is lowered, and the sub threshold value slope of the device can be greatly lower than 60mV/dec.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a gate-around nanowire field-effect transistor and a preparation method thereof. Background technique [0002] As devices continue to shrink, traditional Fin Field Effect Transistors (FinFETs) face severely degraded sub-threshold characteristics, sharply increased source-drain punch-through leakage currents, and gate-dielectric tunneling leakage currents, improving drive performance and reducing system power consumption. There are many serious challenges such as the contradictory requirements of voltage and statistical fluctuations of electrical parameters caused by process variation. Therefore, a steeper sub-threshold slope means that a lower threshold voltage and lower power consumption can be obtained. However, due to the limitation of its physical characteristics, the sub-threshold slope of traditional MOSFETs cannot be lower than 60mV / dec. [0003] How to provide a l...

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Problems solved by technology

[0004] The main purpose of the present invention is to provide a gate-all-around nanowire field effect transistor and its preparation method to solve the problem of high subthreshold slope of fin field effect transistors in the prior art

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