Tunneling transistor with hetero-material grid dielectrics and forming method of tunneling transistor

A technology of tunneling transistors and gate dielectrics, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as inability to optimize control, achieve the effect of improving drive performance and enhancing gate control capabilities

Active Publication Date: 2012-07-25
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to at least solve one of the above-mentioned technical defects, especially solve the problem that the gate of the existing tunneling transistor device cannot be optimally controlled according to the characteristics of the resistance of the two parts of the channel region

Method used

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  • Tunneling transistor with hetero-material grid dielectrics and forming method of tunneling transistor
  • Tunneling transistor with hetero-material grid dielectrics and forming method of tunneling transistor
  • Tunneling transistor with hetero-material grid dielectrics and forming method of tunneling transistor

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Embodiment Construction

[0020] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0021] In describing the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", " The orientations or positional relationships indicated by "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying Describes, but does not indicate or imply that the device or element referred...

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Abstract

The invention provides a tunneling transistor with hetero-material grid dielectrics and a forming method of the tunneling transistor. The tunneling transistor comprises a substrate, a channel region, a source region, a drain region and a grid stack, wherein the channel region is formed in the substrate; the source region and the drain region are formed in the substrate and respectively at both sides of the channel region; the source region belongs to first type of heavy doping; the drain region belongs to second type of heavy doping; the grid stack is formed on the substrate; the grid stack comprises a grid dielectric layer and a grid electrode, wherein the grid dielectric layer is located on the channel region, and the grid electrode is located on the grid dielectric layer; the grid dielectric layer comprises a first section of grid dielectric near the source region and a second section of grid dielectric near the drain region; and the first section of grid dielectric and the second section of grid dielectric are different in material. Through introducing local stress into the channel region by the first section of grid dielectric near the source region, the tunneling effective mass is changed, and the tunneling current is increased, and through introducing the local stress into the channel region by the second section of grid dielectric near the drain region, the electronic mobility is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a tunneling transistor with a heterogeneous gate dielectric and a forming method thereof. Background technique [0002] For MOSFET (Metal Oxide Semiconductor Field Effect Transistor) integrated circuits, the off-state leakage current rises rapidly with the reduction of the size of the integrated circuit. Field Effect Transistors (TFETs) are widely used. The current in the channel region of the tunneling transistor is composed of two parts. The current is generated through band tunneling at one end close to the source region, and then reaches the drain region through the drift diffusion mechanism in the gate-controlled inversion channel, so the channel of the tunneling transistor The channel resistance is actually a series connection of two parts of the channel region near the source region and near the drain region. [0003] In the existing tunnelin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/51H01L21/336
Inventor 崔宁梁仁荣王敬许军
Owner TSINGHUA UNIV
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