Ring gate field effect transistor and preparation method thereof

Abstract

The invention relates to a ring gate field effect transistor and a preparation method thereof. The preparation method includes the following steps that: a first gate dielectric layer, a channel layer, a second interface control layer, a source-drain layer and a semiconductor material layer are formed on a substrate; the semiconductor material layer is removed through etching, a structure shaped like a Chinese character ''tu' is formed in a channel region along a longitudinal direction through etching, the etching of the protruding part of the structure shaped like a Chinese character ''tu' is performed until arriving at the second interface control layer, and the etching of two sides of the structure shaped like a Chinese character ''tu' is performed until arriving at the first gate dielectric layer; third interface control layers grow on two side walls of the protruding part of the channel region, and a second gate dielectric layer and a second gate metal layer are formed on the upper surface of the protruding part from bottom to top, wherein the upper surface of the protruding part is separated from a source region and a drain region by a certain distance, and the second gate dielectric layer and the second gate metal layer extend to the side walls of the third interface control layers and the upper surfaces of flat stages at two sides of the protruding part; and a source-drain metal layer is formed at a portion at the upper surface of the source-drain layer in the source region and the drain region, wherein the portion is adjacent to the outer side of the upper surface of the source-drain layer. According to the transistor provided by the invention, channel scattering can be decreased, channel carrier mobility, gate control ability and current driving ability can be improved, and a short channel effect and a DIBL effect can be effectively suppressed.

Description

technical field [0001] The invention relates to a semiconductor integrated device, in particular to a ring gate field effect transistor and a preparation method thereof. Background technique [0002] With the proportional reduction of the feature size of devices, the performance of silicon-based CMOS devices and the integration level of integrated circuits have been greatly improved. When CMOS technology enters the 45nm technology node, traditional silicon-based CMOS devices can no longer meet the demand for semiconductor performance. Therefore, the introduction of new materials and new structures has become one of the solutions in the post-Moore era. III-V semiconductor materials Due to its advantages of high electron mobility and wide bandgap width, it has become one of the first choices for channel materials of CMOS devices. At the same time, when the device size enters the 22nm technology node, factors such as short channel effect, source-drain punchthrough and quantum ...

AI Technical Summary

Problems solved by technology

At the same time, when the device size enters the 22nm technology node, factors such as short channel effect, source-drain punchthrough and quantum effect of the device seriously affect the performance of CMOS devices.

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