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Method for controlled layer transfer

A stress layer and base substrate technology, applied in semiconductor devices, electrical components, circuits, etc.

Active Publication Date: 2012-12-19
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is a moderately large processing window for metastable states

Method used

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  • Method for controlled layer transfer
  • Method for controlled layer transfer
  • Method for controlled layer transfer

Examples

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Embodiment Construction

[0015] The present disclosure, which provides a method for controlling spallation mode fracture in a spallation process, is now described in more detail with reference to the following discussion and accompanying drawings that accompany this application. Note that the drawings are provided for explanatory purposes only and are not drawn to scale. Also, similar reference numerals are used for descriptions of similar elements in the drawings.

[0016] In the following description, numerous specific details are set forth, such as particular structures, components, materials, dimensions, processing steps and techniques, in order to explain the present disclosure. However, it will be readily apparent to those skilled in the art that various embodiments of the present disclosure may be practiced without these details or with other specific details. In other instances, well-known structures or process steps have not been described in detail so as not to obscure the various embodimen...

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Abstract

The invention relates to a method of controlled layer transfer. The method includes providing a stressor layer to a base substrate. The stressor layer has a stressor layer portion located atop an upper surface of the base substrate and a self-pinning stressor layer portion located adjacent each sidewall edge of the base substrate. A spalling inhibitor is then applied atop the stressor layer portion of the base substrate, and thereafter the self-pinning stressor layer portion of the stressor layer is decoupled from the stressor layer portion. A portion of the base substrate that is located beneath the stressor layer portion is then spalled from the original base substrate. The spalling includes displacing the spalling inhibitor from atop the stressor layer portion. After spalling, the stressor layer portion is removed from atop a spalled portion of the base substrate.

Description

technical field [0001] The present disclosure relates to semiconductor device fabrication, and, more particularly, to a method of controlled layer transfer from a pinned stressor layer portion utilizing a stressor layer formed near an edge of a base substrate. Background technique [0002] Removal of surface layers from brittle substrates by using controlled spalling technology holds promise for changing the cost structure of high-efficiency photovoltaic materials as well as enabling new features in the field of semiconductor technology (e.g., flexible photovoltaics, A powerful approach for flexible circuits and displays). The basis of this technique is the application of a tensile stressor layer on the surface of the base substrate to be spalled. The tensile stressor layer has a combination of thickness and stress sufficient to induce spalling mode fracture in the base substrate. Such a spallation process is disclosed, for example, in US Patent Application Publication No....

Claims

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Application Information

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IPC IPC(8): H01L21/30
CPCH01L21/304H01L31/1896Y02E10/50Y02P80/30
Inventor S·W·贝德尔K·E·佛格尔P·A·劳罗D·A·萨达纳
Owner GLOBALFOUNDRIES INC