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Low-power-consumption WOLA (Weighted Overlap-Add) filterbank and analyzing and integrating stage circuit

An analysis stage, filter bank technology, applied in hearing aids, electrical components, adaptive networks, etc., can solve the problem of high power consumption of WOLA filters, reduce dynamic flip power consumption, reduce the number of reading and writing, and reduce memory reading. The effect of the number of times written

Active Publication Date: 2015-05-20
SOI MICRO CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0027] In the process of realizing the present invention, the applicant realized that the prior art WOLA filter bank has the following technical problems: due to the multiple read and write operations of the memory, the power consumption of the WOLA filter is relatively high

Method used

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  • Low-power-consumption WOLA (Weighted Overlap-Add) filterbank and analyzing and integrating stage circuit
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  • Low-power-consumption WOLA (Weighted Overlap-Add) filterbank and analyzing and integrating stage circuit

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Embodiment Construction

[0079] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0080] The basic ideas of the present invention are: ① reduce the memory read and write operations with large power consumption overhead as much as possible; consumption. Hereinafter, unless otherwise specified, each parameter is an integer greater than 1, such as L A , L S , r, k, etc.

[0081] In a basic embodiment of the present invention, a WOLA filter bank analysis stage circuit is disclosed. figure 2 It is a schematic structural diagram of the analysis stage circuit 1 of the embodiment of the present invention. Such as figure 2 As shown, the analysis stage circuit 10 of this embodiment includes: an input buffer module 102, a sample sequence storage module (hereinafter referred to as Srcddata_mem) 106, an anal...

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Abstract

The invention discloses a low-power-consumption WOLA (Weighted Overlap-Add) filterbank and an analyzing and integrating stage circuit, which are suitable for a digital hearing-aid adopting a multi-channel signal processing technology. Times of write-read operations of memories with large power consumption are directly reduced by using methods of reading data by discontinuous addresses to carry out 'multiply-accumulate' and 'multiple-add' operations, mode addressing, and changing the initial read-write address to replace data shifting operation, using a folded memory, replacing the memory by a logic decoding circuit to 'store' window coefficients with fixed numerical values and the like. Meanwhile, with the adoption of double operation units combined with the folded memory, two operations are realized and executed to further reduce the clock period time required by the whole system operation, so that the dynamic overturning power consumption can be conveniently reduced by reducing the clock frequency of the system or using the clock gating technology.

Description

technical field [0001] The invention relates to the technical field of digital signal processing in the electronics industry, in particular to a low-power WOLA filter bank and an analysis stage circuit thereof. Background technique [0002] Digital hearing aids are portable medical electronic devices that have strict requirements on low power consumption. In almost all current high-end digital hearing aid systems, methods based on multi-channel signal processing are used to realize functions such as loudness compensation and noise cancellation. [0003] In multi-channel signal processing, the Discrete Fourier Transform (DFT) filter bank is the most commonly used uniform bandwidth filter bank, and the WOLA (Weighted Overlap Add) structure is an efficient implementation method for it . The WOLA filter bank implements multi-channel analysis and comprehensive operations on the input signal with a flexible block processing method, and there is less overlap between channels, so ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04R25/00H03H21/00
Inventor 于增辉黑勇周玉梅陈黎明徐欣锋
Owner SOI MICRO CO LTD
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