Pipeline analog-to-digital converter and method thereof
An analog-to-digital, pipelined technology, applied in the field of analog-to-digital converters, can solve the problems of increasing ADC power consumption, increasing integrated circuit size, design complexity, etc., achieving low ADC power consumption, reducing capacitor mismatch errors, The effect of small capacitors
Inactive Publication Date: 2016-04-20
PIXART IMAGING INC
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These requirements increase IC size, design complexity, and also increase ADC power consumption
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[0065] Other embodiments will be disclosed herein, or other embodiments will become apparent to those skilled in the art after reading and understanding this specification and the accompanying drawings.
[0066] Such as figure 1 As shown, a capacitive touch screen system 110 usually consists of the following: a lower layer LCD (Liquid Crystal Display) (or OLED; Organic Light-Emitting Diode) display 112, a touch screen (or touch sensing panel) 90, a setting A dielectric plate (or protective cover) 95 above the touch screen 90 , and a touch screen controller (or microprocessor, application specific integrated circuit (ASIC)), central processing unit (CPU)) 100 . It should be noted that, besides the LCD display or the OLED display, other image displays may also be arranged under the touch screen 90 .
[0067] figure 2 A block diagram of an embodiment of a touch screen controller 100 is shown. In one embodiment, the touch screen controller 100 may be an Avago Technologies Co.,...
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The invention provides a pipeline-type analog-to-digital converter and a method thereof, specifically to a method and a device for reducing capacitor mismatch error in a pipeline-type analog-to-digital converter (ADC). The pipeline-type analog-to-digital converter comprises a plurality of pipeline element circuits which are corresponding to given positions of the ADC respectively. When the pipeline-type analog-to-digital converter runs in a capacitor mismatch correcting period, a first pipeline element circuit digitalizes analog A and B capacitor mismatch error correcting voltages generated by the pipeline element circuits of the ADC. Digital representations, which are corresponding to the analog A and B capacitor mismatch error correcting voltages, of the pipeline element circuits are sent to an output shift register and summing circuit which generates capacitor mismatch error correcting codes corresponding to the positions and pipeline element circuits. After conversion of analog signals input to the ADC, the capacitor mismatch error correcting codes are applied to various weights of the ADC.
Description
technical field [0001] Various embodiments of the invention described herein relate generally to the field of analog-to-digital converters (ADCs), and also to devices included in touchscreens, touchpads, and / or touchpanel controls. tor in the ADC field. Background technique [0002] To increase bit resolution in digital imaging applications for navigation (for example, in capacitive touch screen integrated controllers, or in integrated optical imagers in finger navigation elements / mouse), it is often necessary to Measures are taken during the design phase to resolve issues caused by mismatches between the various integrated components in the ADC. Pipelined ADC architectures are frequently used in imaging applications due to their ability to simultaneously process multiple elements in an array of imaging data. In metal oxide silicon (MOS) pipeline ADCs and integrated circuits containing them, the most matched components are usually capacitors in the multiplying digital-to-a...
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IPC IPC(8): H03M1/10
Inventor 利塔立·史考屈寇弗
Owner PIXART IMAGING INC