Address alignment SIMD (Single Instruction Multiple Data) acceleration method of array addition operation assembly library program

Abstract

The invention discloses an address alignment SIMD (Single Instruction Multiple Data) acceleration method of an array addition operation assembly library program, aiming at improving the execution speed of the array addition operation assembly library program. The technical scheme of the invention is as follows: the address alignment SIMD acceleration method comprises the following steps of: acquiring an SIMD vector width w and a data width size from a target system structure first, then calculating the address alignment offset of an array X and an array Y, judging whether addresses of the array X and the array Y are aligned according to the address alignment offset, and if so, directly carrying out vector addition operation on the array X and the array Y; and if not, carrying out vector assembly and hybrid operation on the array X and the array Y, namely carrying out scalar operation on the front parts of the array X and the array Y, carrying out vector assembly and vector operation on the middle parts of the array X and the array Y by using a register mask and carrying out scalar operation on parts, which do not meet the vector operation requirement, at the tail parts of the array X and the array Y. The address alignment SIMD acceleration method disclosed by the invention has the capabilities of realizing data access and storage of the assembly library program based on address alignment, accelerating the SIMD program operation and promoting the SIMD calculation performance.

Description

technical field [0001] The invention relates to an address-aligned SIMD (Single Instruction Multiple Data, Single Instruction Multiple Data) accelerated calculation method for array addition operations, in particular to an address-aligned SIMD acceleration method for array addition operations assembly library programs. Background technique [0002] The traditional CPU scalar floating-point calculation unit can only perform one floating-point operation at a time, while the SIMD functional unit can complete multiple floating-point operations at a time, which is an important part to improve the speed of the microprocessor. Design SIMD operation program. [0003] Existing SIMD extension processors are very sensitive to data access address behavior. In general, SIMD extensions only support sequential memory access data loads and stores, and only address-aligned memory access data loads and stores. Such as the AltiVec extension of the PowerPC processor, the MVI extension of the ...

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Problems solved by technology

[0010] The above methods emphasize the importance of address alignment memory access to SIMD programming from different aspects, and propose specific solutions for specific applications, but the above solutions are limited to using high-level language programming to preprocess arrays to improve compilation. The optimized performance of the device, the optimization effect is not obvious and it is difficult to popularize and apply in practice

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