A kind of polysilicon wafer texturing cleaning process method

A technology for polycrystalline silicon wafers and silicon wafers, applied in cleaning methods and appliances, cleaning methods using liquids, chemical instruments and methods, etc., can solve problems such as increased production costs and difficult control of product quality, and achieve improved effects and significant results , low-cost effect

Active Publication Date: 2015-09-16
CHANGZHOU S C EXACT EQUIP
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Problems solved by technology

In the above-mentioned traditional process method, to improve the conversion efficiency of the battery sheet by 0.2-0.3%, SE (selective emitter cell technology), back polishing (the back of the diffused silicon wafer is chemically polished to increase the reflectivity to 30%) Above), DP (printing the gate lines of the silicon wafer twice), back passivation (plating a passivation layer on the back of the silicon wafer) and other high-cost complex processes increase the manufacturing cost, and the product quality is difficult to control

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  • A kind of polysilicon wafer texturing cleaning process method

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Embodiment Construction

[0018] The invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0019] Such as figure 1 Shown, the texture cleaning process of the polysilicon chip that the present invention proposes comprises the following steps:

[0020] 1. Silicon wafers are first soaked in a mixed solution of 5-7.5% HF and 35-45% HNO3 at a temperature controlled at 5-15°C for 0.8-1.5 minutes, and acid-etched to achieve the purpose of preliminary texturing of silicon wafers . During this process, a certain amount of HF and HNO3 is added in a timely manner according to the consumption of the reaction between the solution and the silicon wafer, so as to ensure the proper proportion of the solution;

[0021] 2. The silicon wafer after acid etching is immediately cleaned in 10-18MΩ·cm pure water by spraying, soaking or a combination of the two methods, in order to minimize the adhesion of acid on the surface of the silicon wafer;

[0022] 3. The silico...

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Abstract

The invention discloses a texturing and cleaning process method of a polysilicon wafer. The method comprises the following steps of 1, firstly, putting the polysilicon wafer in a mixing solution of HF (hydrogen fluoride) and HNO3 (hydrogen nitrate), and soaking; 2, putting the polysilicon wafer corroded by acid into pure water, and cleaning; 3, putting the polysilicon wafer in an alkaline solution, carrying out alkaline corrosion treatment, adding a texturing additive into the alkaline solution, and carrying out secondary texturing on the polysilicon wafer; 4, putting the polysilicon wafer corroded by alkali into the pure water, and cleaning; 5, putting the polysilicon wafer in a mixing solution of HCl (hydrogen chloride) and HF, and soaking; 6, putting the polysilicon wafer corroded by the acid into the pure water, and cleaning; and 7, drying the treated polysilicon wafer. The process method has the advantages that on the premise of not changing other processes, the final converting efficiency of the polysilicon wafer is improved by 0.2% to 0.3%, and the purpose of final efficiency stacking of a battery sheet is realized.

Description

technical field [0001] The invention relates to the field of cleaning and drying equipment for solar silicon wafers, in particular to a texturing and cleaning process for polycrystalline silicon wafers used in the photovoltaic industry. Background technique [0002] Texturing and cleaning are required in the production of polysilicon wafers. The traditional process includes low-temperature high-concentration acid solution velvet, normal temperature low-concentration acid solution velvet, dilute alkali washing, ion removal and passivation. In the above-mentioned traditional process method, to improve the conversion efficiency of the battery sheet by 0.2-0.3%, SE (selective emitter cell technology), back polishing (the back of the diffused silicon wafer is chemically polished to increase the reflectivity to 30%) Above), DP (printing the gate line of the silicon wafer twice), back passivation (plating a passivation layer on the back of the silicon wafer) and other high-cost co...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L31/18C30B33/10B08B3/08B08B3/02B08B3/04
CPCY02P70/50
Inventor 左国军李国庆
Owner CHANGZHOU S C EXACT EQUIP
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