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Substrate align marks and manufacturing method thereof and substrate

An alignment mark and production method technology, which is applied in the photoengraving process of the pattern surface, semiconductor/solid-state device manufacturing, semiconductor/solid-state device parts and other directions, can solve the problems of uneven coating, inability to identify alignment marks, etc. The effect of reducing the defective rate and improving the recognition success rate

Active Publication Date: 2013-07-10
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The invention provides a substrate alignment mark and a manufacturing method thereof, which are used to solve the problem that the alignment mark cannot be recognized during alignment due to uneven coating during the formation of the alignment mark;

Method used

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  • Substrate align marks and manufacturing method thereof and substrate
  • Substrate align marks and manufacturing method thereof and substrate
  • Substrate align marks and manufacturing method thereof and substrate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] In order to improve the recognition success rate of alignment marks in the substrate manufacturing process, this embodiment provides a method for manufacturing alignment marks on a substrate, which includes the step of forming a first alignment mark pattern and the step of forming a second alignment mark pattern . Wherein, the first alignment mark pattern and the second alignment mark pattern are located on different layer structures of the substrate (here, different layer structures refer to patterns formed by different layers of thin films on the substrate, and correspondingly, the same layer structure refers to patterns on the substrate. pattern formed by the same layer of film), and the centers coincide, that is, the centers of the first alignment mark pattern and the second alignment mark pattern correspond up and down, and are located on a straight line, so that when the alignment is performed through the two alignment marks respectively, Can maintain alignment co...

Embodiment 2

[0045] Correspondingly, this embodiment also provides a substrate alignment mark, combined with Figure 1-Figure 5 As shown, the substrate alignment mark includes different layer structures on the substrate (different layer structures here refer to patterns formed by different layers of thin films on the substrate, and correspondingly, the same layer structure refers to patterns formed by the same layer of thin films on the substrate) The first alignment mark pattern 1 and the second alignment mark pattern 2, wherein the center o of the first alignment mark pattern 1 and the center o' of the second alignment mark pattern 2 coincide, that is, the first alignment mark The centers o and o' of the pattern 1 and the second alignment mark pattern 2 correspond up and down, and are located on a straight line, so that the consistency of alignment can be maintained when two alignment marks are used for alignment respectively. Moreover, there is no overlapping portion between the first a...

Embodiment 3

[0049] This embodiment provides a substrate with an alignment mark on it, and the alignment mark adopts the substrate alignment mark in Embodiment 2. Since the success rate of alignment mark identification is improved, the production process of the substrate is greatly reduced. In the defect rate due to the inability to recognize the registration mark.

[0050] For the array substrate of TFT-LCD, thin film transistors are formed on it, in the actual application process, combined with figure 1 As shown, the first alignment mark pattern 1 can be designed to be made of the same metal layer as the gate electrode of the thin film transistor, and the second alignment mark pattern 2 is made of the same metal layer as the source and drain electrodes of the thin film transistor.

[0051] It can be seen from the above embodiments that the substrate alignment mark and its manufacturing method provided by the present invention, by making two alignment mark patterns on different layer stru...

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PUM

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Abstract

The invention belongs the technical field of align and discloses substrate align marks, a manufacturing method of the substrate align marks and a substrate. Patterns of the two align marks are manufactured on structures of different layers of the substrate, when one align mark can not be identified when align is conducted due to the fact that a coating film is uneven in the forming process of the one align mark, and the align can be further conducted by identification of the other align mark, the identification success rate of the align marks is improved, and therefore the defective percentage due to the fact that the align marks can not be identified is greatly reduced in the manufacturing process of the substrate.

Description

technical field [0001] The invention relates to the field of alignment technology, in particular to a substrate alignment mark, a manufacturing method thereof, and a substrate. Background technique [0002] The development of liquid crystal display technology has been quite mature so far, and the main competition of various panel companies tends to increase the yield rate and reduce the cost. Photolithography is a necessary link in the production of Thin Film Transistor Liquid Crystal Display ("TFT-LCD"). When the exposure machine performs exposure, in order to achieve the coincidence of the graphics between the layers to meet the requirements, usually on the substrate Alignment marks are made on the periphery to ensure accurate alignment. [0003] The alignment mark in the prior art is generally made on the same layer as the gate electrode or source-drain electrode of a thin film transistor (Thin Film Transistor, referred to as "TFT"), and the gate electrode is formed by c...

Claims

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Application Information

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IPC IPC(8): H01L23/544H01L21/02G03F9/00
CPCH01L2223/54426H01L2223/54486G03F9/7076G03F9/7084H01L2924/0002H01L23/544H01L2924/00H01L21/64
Inventor 田川郝昭慧
Owner BOE TECH GRP CO LTD
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