Supercharge Your Innovation With Domain-Expert AI Agents!

Design method of pulse compression linear limiter on basis of Field Programmable Gate Array (FPGA)

A design method and limiter technology, applied in the direction of limit amplitude change rate, electrical components, code conversion, etc., can solve the problems of destroying clutter phase, moving target processing, etc., achieve high practical value, and avoid the spread of signal spectrum Effect

Inactive Publication Date: 2013-11-13
THE 724TH RES INST OF CHINA SHIPBUILDING IND
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The limiting method used in the past is to quadrature the pulse pressure I, Q The signals are limited separately, which will destroy the phase of the clutter and affect the subsequent moving target processing

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Design method of pulse compression linear limiter on basis of Field Programmable Gate Array (FPGA)
  • Design method of pulse compression linear limiter on basis of Field Programmable Gate Array (FPGA)
  • Design method of pulse compression linear limiter on basis of Field Programmable Gate Array (FPGA)

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0011] 1. After pulse compression I, Q Signal normalization processing. Normalization is done as follows:

[0012]

[0013] The normalization process in the FPGA is divided into two steps. The first step is to use the coordinate rotation digital calculation method (CORDIC) to obtain the phase of the pulse pressure signal. α . The CORDIC algorithm can recursively calculate commonly used function values ​​through shifting and addition and subtraction operations, including the arctangent function tan -1 . The FPGA development platform ISE of XILINX provides a free CORDIC algorithm IP core, which can be set to find the arctangent function (such as figure 2 shown), and instantiated, the generated module realizes the I, Q A function of the signal phase. The second step is to obtain cos again through the CORDIC algorithm α and sin α , the CORDIC algorithm IP core can be set to calculate the sine function and cosine function at the same time, and the 90-degree phase differ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a design method of a pulse compression linear limiter on the basis of a Field Programmable Gate Array (FPGA). The design method includes that for signals I and signals Q obtained after digital pulse compression, the phase alpha and the module value A of the signals are obtained through real-time calculating in a Coordinated Rotation Digital Computing (CORDIC) method; new signals cos alpha and sin alpha are generated according to the phase alpha through a CORDIC algorithm, an amplitude limiting function is obtained through a lookup table according to the module value A so as to obtain the amplitude limited module value A'; the A' is multiplied with cos alpha and sin alpha to obtain amplitude limited signals I' and amplitude limited signals Q'; the phase of the original pulse compression signals is reserved in the amplitude limited signals I' and amplitude limited signals Q', but the signal dynamic range is compressed. The pulse compression linear limiter on the basis of the FPGA can compress the pulse compression dynamic range of a radar system on the premise of keeping the phase of the original pulse compression signals, leads the dynamic range to be matched with improved factors in moving target processing, enhances the clutter inhibitory effect and plays an important role in engineering application.

Description

technical field [0001] The invention belongs to the field of radar signal processing, and realizes the purpose of compressing the pulse-compressed signal dynamic range by designing an FPGA-based linear limiter. Background technique [0002] In the modern radar system design, the design of the limiter after pulse compression is of great significance. The signal-to-noise ratio of the radar echo signal will be greatly improved after pulse compression, that is, matched filtering, and the dynamic range of the signal will also be greatly improved accordingly. Affected by the working mode of the radar and the clutter environment, the improvement factor of moving target processing is often limited to a certain extent, and the signal dynamic range after pulse compression exceeds the maximum improvement factor of the system, which will cause clutter residue after moving target processing. Based on the above reasons, it is usually necessary to limit the amplitude of the compressed pul...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H03G11/08H03M7/30
Inventor 刘溶陈伟李伟李颖
Owner THE 724TH RES INST OF CHINA SHIPBUILDING IND
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More