Auxiliary phase discrimination circuit of PN code loop

Abstract

The invention relates to an auxiliary phase discrimination circuit of a PN code loop. The auxiliary phase discrimination circuit of the PN code loop can expand the range of phase discrimination of the PN code loop and the range of capture of phase positions of the PN code loop, and can improve the tolerance capacity of the PN code loop to initial phase position errors. According to the technical scheme, a PN code loop phase discrimination circuit and an extended PN code loop phase discrimination circuit are used, wherein the PN code loop phase discrimination circuit is formed by two paths, and each path is formed in the mode that a correlator circuit, an accumulated point zeroing filter circuit and an absolute-value evaluation circuit are connected in series in sequence, and the common end of the two paths is connected with a subtracter; the extended PN code loop phase discrimination circuit is formed by two paths, and each path is formed in the mode that a correlator circuit, an accumulated point zeroing filter circuit and an absolute-value evaluation circuit are connected in series in sequence, and the common end of the two paths is connected with a subtracter; the correlator circuits of the PN code loop phase discrimination circuit and the correlator circuits of the extended PN code loop phase discrimination circuit are respectively connected with code sequence output of a PN code generator, and the subtracter of the PN code loop phase discrimination circuit and the subtracter of the extended PN code loop phase discrimination circuit are together connected with an added circuit used for solving error voltage. Error voltage output is obtained by the PN code loop phase discrimination circuit and the extended PN code loop phase discrimination circuit through the added circuit. Compared with the prior art, the capture range of the auxiliary phase discrimination circuit of the PN code loop is three times that of an initial phase position, and a related secondary peak, located within the range from a positive half chip to a negative half chip, of an existing phase discrimination circuit can be eliminated.

Description

technical field [0001] The invention relates to a PN code ring auxiliary phase detection circuit mainly used in a large phase initial acquisition range in a spread spectrum communication system. Background technique [0002] In the spread spectrum receiver, the received signal enters the FPGA after A / D conversion, and first enters the acquisition module, and each PN chip has a correlation value output at every moment. When the correlation value is greater than the threshold, it means that the capture is successful, and it turns to the tracking stage. In the tracking phase, the PN code generation module generates three PN codes in advance, middle and lag according to the clock signal of the code clock generation module, and the received signal and the three PN codes are respectively correlated in the phase detection module, and the middle one generates a despreading code output, The correlation values ​​of the leading and lagging paths are differenced and the result is output...

AI Technical Summary

Problems solved by technology

At present, the phase detection structure of the PN code loop usually adopts a single Δ phase detection structure. Under this structure, the PN code loop can only complete the loop when the phase difference between the local PN code sequence and the input PN code sequence is less than plus or minus half a symbol. However, the PN code fast capture technology is often difficult to achieve the capture accuracy of plus or minus half a symbol. In order to realize the loop capture of the PN code when the initial capture accuracy exceeds plus or minus half a symbol, it is necessary to use the buckle (increase) clock or other equivalent methods to pull the phase of the local PN code sequence to within the range of plus or minus half a symbol of the phase of the input PN code sequence, which will greatly increase the complexity of the circuit and processing flow; at the same time, at the signal level In the case of large dynamics, in order to adapt to weak-level signals, the working threshold of the PN code loop is low, and the secondary correlation peak of strong-level signals can cause false locking of the loop. Before the phase difference between the local PN code sequence and the input PN code sequence is less than plus or minus half a symbol, the PN code loop is falsely locked at the secondary correlation peak position

In order to determine false locking, additional circuits need to be added for determination, which will greatly increase the complexity of the circuit and processing flow, and greatly increase the average locking time

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