Memory device and method making same

Abstract

A memory device includes a first conductor, a diode, a memory element, and a second conductor arranged in series. The diode includes a first semiconductor layer over and in electrical communication with the first conductor. A patterned insulating layer has a sidewall over the first semiconductor layer. The diode includes an intermediate semiconductor layer on a first portion of the sidewall, and in contact with the first semiconductor layer. The intermediate semiconductor layer has a lower carrier concentration than the first semiconductor layer, and can include an intrinsic semiconductor. A second semiconductor layer on a second portion of the sidewall, and in contact with the intermediate semiconductor layer, has a higher carrier concentration than the intermediate semiconductor layer. A memory element is electrically coupled to the second semiconductor layer. The second conductor is electrically coupled to the memory element.

Description

Technical field [0001] The present invention relates to high-density memory devices based on phase change memory materials such as chalcogenide and other programmable resistance memory materials, and methods for manufacturing such devices. Background technique [0002] In some programmable resistance memory array configurations, each memory cell includes a diode in series with a phase change memory element. The diode is used as a driving element, so that the memory cell can be selected when a forward bias voltage is applied to the diode, and the current in the memory cell is blocked by reverse biasing the diode to select the memory cell. This phase change memory element is composed of a phase change material, which has a great difference in resistance between an amorphous state (high resistivity) and a crystalline state (low resistivity). [0003] In the normal operation of a phase change storage element, when a current pulse is applied through the phase change storage element and...

AI Technical Summary

Problems solved by technology

Such techniques can use advanced lithographic tools or multiple patterning processes to produce smaller diode sizes and are therefore not suitable for scaling

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