A method for preparing a germanium-containing thin film structure on an insulator
A germanium film and insulator technology is applied in the field of preparation of a germanium-containing film structure on an insulator, which can solve the problems of poor quality and high threading dislocation density, achieve wide application prospects and reduce the effect of defect sources.
Active Publication Date: 2016-05-18
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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Problems solved by technology
[0006] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a method for preparing a germanium-on-insulator thin film structure, which is used to solve the problem of penetration in the prior art. Problems with high error density and poor quality
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[0032] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.
[0033] see Figure 1 to Figure 4 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arb...
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Abstract
The invention provides a production method for a thin film structure containing germanium on an insulator. The production method for the thin film structure containing the germanium on the insulator comprises the following steps of S1, providing an s SOI (Silicon On Insulator) substrate, growth growing a monocrystal SiGe thin film with Ge components preinstalled on the surface of tensile strain top layer silicon in an epitaxial mode and enabling the lattice length of the tensile strain top layer silicon to be identical to that of the monocrystal SiGe thin film; S2, forming into a Si cap layer on the surface of the monocrystal SiGe thin film; S3, performing germanium concentration on a structure obtained from the S2 and forming into a laminated structure which sequentially comprises a back substrate, an oxygen buried layer, a thin film containing the germanium and a silicon dioxide layer from top to bottom; S4, corroding the silicon dioxide layer on the surface of the laminated structure to obtain the thin film structure containing the germanium on the insulator. According to the production method for the thin film structure containing the germanium on the insulator, appropriate tensile strain top layer silicon and corresponding monocrystal SiGe thin film containing the germanium components are selected, so that the lattice of the tensile strain top layer silicon is matched with that of the monocrystal SiGe thin film, the defect source is reduced, and high quality SGOI (Silicon Germanium On Insulator) or GOI (Germanium On Insulator) material can be obtained.
Description
technical field [0001] The invention belongs to the field of semiconductor manufacturing and relates to a method for preparing a germanium-containing thin film structure on an insulator. Background technique [0002] SOI (Silicon-On-Insulator, silicon on insulating substrate) technology introduces a buried oxide layer between the top silicon and the back substrate. By forming a semiconductor thin film on an insulator, the SOI material has the incomparable advantages of bulk silicon: it can realize the dielectric isolation of components in integrated circuits, and completely eliminate the parasitic latch effect in bulk silicon CMOS circuits; The integrated circuit also has the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short channel effect, and is especially suitable for low-voltage and low-power circuits. Therefore, it can be said that SOI will likely become a deep submicron low-voltage , The mainstream technology ...
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IPC IPC(8): H01L21/02H01L21/762
CPCH01L21/02422H01L21/02617H01L21/02664
Inventor 张苗陈达狄增峰叶林王刚郭庆磊母志强
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI