Copy-on-write circuit suitable for static random access memory

Abstract

The invention provides a copy-on-write circuit suitable for a static random access memory. The copy-on-write circuit consists of a copy word line load, a copy bit line load, a copy bit line selector, a copy-on-write selector, a copy-on-write unit, a state machine, a line decoder, a storage array, a control circuit, a pre-decoder, a bit line selector, a sense amplifier and an input/output circuit, wherein the copy word line load is used for simulating load on a word line during normal write operation; the copy bit line load is used for simulating load on a bit line during the normal write operation; the copy bit line selector and the copy-on-write driver are used for simulating the bit line selector and the write driver during normal write operation; the copy-on-write unit is used for simulating a storage unit which is rewritten during the normal write operation; the state machine is used for switching between a start state and an end state for the normal write operation. By simulating normal '0' write operation, the accurate self-timing is provided for write operation under different process voltage temperatures of the static random access memory. Compared with the prior art, the copy-on-write circuit has the advantages that the bit line pulse width is reduced by 20 percent during the write operation.

Description

【Technical field】 [0001] The invention relates to the field of static random access memory design, in particular to a write copy circuit suitable for static random access memory. 【Background technique】 [0002] As an important storage element in integrated circuits, SRAM is widely used in high-performance computer systems (CPU), system-on-chip (SOC), handheld devices, etc. due to its high performance, high reliability, and low power consumption. computing field. [0003] With the continuous evolution of process technology and the continuous shrinking of the size of semiconductor devices, local and global process deviations have an increasing impact on the performance and reliability of integrated circuits. In order to overcome this effect, some on-chip adaptive technologies that are not sensitive to process voltage temperature (PVT) have been widely researched and applied in recent years. By adding a copy circuit on the chip, to track the impact of PVT environmental change...

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Problems solved by technology

However, for those applications whose write access time is equally critical or more critical, s...

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