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Frequency converter SVPWM waveform dead-zone compensation method

A technology of dead zone compensation and frequency converter, applied in the field of dead zone compensation, can solve the problems of frequency converter output voltage distortion, high requirements for chip computing power, large output torque oscillation, etc.

Inactive Publication Date: 2014-09-24
WUXI JACT ELECTRIC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the addition of dead time will lead to the distortion of the output voltage of the inverter and the generation of harmonics, especially at low frequencies, the voltage and current will be seriously distorted, and the output torque will have a large oscillation, which is very unfavorable for the inverter to affect the motor. control, so the deadband must be compensated for
The traditional dead zone compensation methods are roughly divided into two types: one is to calculate the average voltage to be compensated for compensation, which is easy to implement but has low compensation accuracy
The second is the pulse-based dead zone compensation method, that is, to modify the six PWM pulse widths of the inverter directly in this period, so as to compensate the output voltage lost or increased due to the dead zone time. Perform more accurate compensation, but the algorithm for dead zone time compensation using this method is relatively complicated and difficult to implement. It requires high computing power of the chip and takes a long time to calculate.

Method used

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  • Frequency converter SVPWM waveform dead-zone compensation method
  • Frequency converter SVPWM waveform dead-zone compensation method
  • Frequency converter SVPWM waveform dead-zone compensation method

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Embodiment Construction

[0023] The present invention will be further described below in conjunction with drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only parts related to the present invention are shown in the drawings but not all content.

[0024] Please refer to figure 1 as shown, figure 1 The flow chart of the method for compensating the dead zone of the SVPWM waveform of the frequency converter provided by the embodiment of the present invention.

[0025] In this embodiment, the method for compensating the dead zone of the SVPWM waveform of the frequency converter specifically includes the following steps:

[0026] Step S101. Determine the size and position of the eight basic voltage space vectors of the SVPWM.

[0027] The theoretical basis of SVPWM is the average value equivalent p...

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Abstract

The invention discloses a frequency converter SVPWM waveform dead-zone compensation method. The method comprises the steps that the sizes and positions of eight SVPWM fundamental voltage space vectors are determined; the direction of the current is determined; all dead-zone effects are centralized in an upper bridge or a lower bridge, a dead zone is divided into a part needing to be offset and a part not needing to be offset by calculating the electrical polarity, the dead-zone time is advanced or delayed through a fly-wheel diode, an IGBT module is turned off or on, and dead-zone compensation is achieved. The method is easy to achieve and operate and high in speed, and the requirement for the chip operating speed is low.

Description

technical field [0001] The invention relates to the technical field of dead zone compensation, in particular to a compensation method for a frequency converter SVPWM waveform dead zone. Background technique [0002] In the inverter circuit of the frequency converter, the upper bridge IGBT (insulated gate bipolar transistor) module and the lower bridge IGBT module of each phase cannot be turned on at the same time, otherwise it will cause a short circuit of the bus voltage and cause explosions and other dangers. At present, the turn-on time of the existing IGBT modules is shorter than the turn-off time. Therefore, if the lower-bridge IGBT modules are turned on while the upper-bridge IGBT modules are turned off, the upper and lower-bridge IGBTs will be turned on at the same time, resulting in bus voltage short circuit. Therefore, it is necessary to add a dead time after sending the closing signal to the upper bridge IGBT module. During this period, the closing signal is sent ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02M1/38
Inventor 许丰
Owner WUXI JACT ELECTRIC
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