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Semiconductor package and method of manufacturing same

A semiconductor and packaging technology, applied in the field of semiconductor packaging with increased structural strength and its manufacturing method, can solve the problems of high cost, easy to be too large, poor product reliability, etc., and achieve the effect of not being easily damaged

Active Publication Date: 2014-10-29
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] However, in the existing manufacturing method, after removing the mold 13, the carrier 10 and the bonding layer 100, the packaging unit 1a lacks sufficient support and protection, so when making the through holes 160, the packaging unit 1a is easy to damaged
[0010] In addition, the encapsulation unit 1a lacks sufficient support and protection, so the warpage of the encapsulant 12 is likely to be too large, so when the through holes 160 are manufactured, the alignment of the through holes 160 is likely to be shifted. As a result, the line redistribution structure 17 cannot be effectively connected to the conductor 16, that is, the electrical connection between the line redistribution structure 17 and the conductor 16 is greatly affected, resulting in low yield and product reliability. Problems such as poor quality and high cost

Method used

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  • Semiconductor package and method of manufacturing same
  • Semiconductor package and method of manufacturing same
  • Semiconductor package and method of manufacturing same

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Embodiment Construction

[0043] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0044]It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the same time, terms such as "above", "first", "second", "th...

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Abstract

A semiconductor package and a method of manufacturing the same are provided, the semiconductor package including a first package unit having a first encapsulant and a first semiconductor element, a second package unit having a second encapsulant and a second semiconductor element, a supporting member interposed between the first and second encapsulant, a plurality of conductors penetrating the first encapsulant, the supporting member and the second encapsulant, and redistribution structures disposed on the first and second encapsulants, wherein the first and second encapsulants are coupled with each other by the supporting member to provide sufficient support and protection to enhance the structure strength of the first and second package units.

Description

technical field [0001] The present invention relates to a semiconductor package, in particular to a semiconductor package with increased structural strength and a manufacturing method thereof. Background technique [0002] With the vigorous development of the electronic industry, electronic products are gradually moving towards the trend of multi-function and high performance. In order to meet the packaging requirements of miniaturization of semiconductor packages, a wafer level packaging (Wafer Level Packaging, WLP) technology has been developed. However, with the rapid development of technology, the electronic packaging structure must increase the number of output / input terminals (I / O) of packaged products to improve the performance of electronic products and meet the needs of future electronic packaging products. Therefore, the technology of wiring lines on opposite sides of the semiconductor package has been developed to meet the quantity requirement of the output / input...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/16H01L21/50
CPCH01L24/97H01L2224/12105H01L24/19H01L21/561H01L24/96H01L21/568H01L23/49861H01L2224/04105H01L23/5389H01L23/49816H01L23/5383H01L23/5384H01L2224/0401H01L2924/3511H01L2924/00
Inventor 纪杰元陈威宇刘鸿汶陈彦亨许习彰
Owner SILICONWARE PRECISION IND CO LTD